e1c13b6464ffcef7d3f718ea0d3b93222dc249dd
[riscv-tests.git] / isa / rv64si / scall.S
1 # See LICENSE for license details.
2
3 #*****************************************************************************
4 # scall.S
5 #-----------------------------------------------------------------------------
6 #
7 # Test syscall trap.
8 #
9
10 #include "riscv_test.h"
11 #include "test_macros.h"
12
13 RVTEST_RV64S
14 RVTEST_CODE_BEGIN
15
16 #ifdef __MACHINE_MODE
17 #define sscratch mscratch
18 #define sstatus mstatus
19 #define scause mcause
20 #define sepc mepc
21 #define stvec_handler mtvec_handler
22 #endif
23
24 li TESTNUM, 2
25 scall
26 j fail
27
28 j pass
29
30 TEST_PASSFAIL
31
32 stvec_handler:
33 li t1, CAUSE_ECALL
34 csrr t0, scause
35 bne t0, t1, fail
36 csrr t0, sepc
37 addi t0, t0, 8
38 csrw sepc, t0
39 sret
40
41 RVTEST_CODE_END
42
43 .data
44 RVTEST_DATA_BEGIN
45
46 TEST_DATA
47
48 RVTEST_DATA_END