isa/rv64sv/ma_vsd.S

   1 #*****************************************************************************
   2 # ma_vsd.S
   3 #-----------------------------------------------------------------------------
   4 #
   5 # Test misaligned vector sd trap.
   6 #
   7
   8 #include "riscv_test.h"
   9 #include "test_macros.h"
  10
  11 RVTEST_RV64S
  12 RVTEST_CODE_BEGIN
  13
  14   setpcr status, SR_EA # enable accelerator
  15   setpcr status, SR_EI # enable interrupt
  16
  17   la a3,handler
  18   mtpcr a3,evec # set exception handler
  19
  20   mfpcr a3,status
  21   li a4,(1 << IRQ_COP)
  22   slli a4,a4,SR_IM_SHIFT
  23   or a3,a3,a4 # enable IM[COP]
  24   mtpcr a3,status
  25
  26   vsetcfg 32,0
  27   li a3,4
  28   vsetvl a3,a3
  29
  30   la a3, src1
  31   la a4, src2
  32   vld vx2,a3
  33   vld vx3,a4
  34   lui a0,%hi(vtcode1)
  35   vf %lo(vtcode1)(a0)
  36   la a3, dest+1
  37   vsd vx1, a3
  38   fence
  39
  40 vtcode1:
  41   add x2,x2,x3
  42   stop
  43
  44 vtcode2:
  45   add x2,x2,x3
  46   stop
  47
  48 handler:
  49   vxcptkill
  50
  51   li x28,2
  52
  53   # check cause
  54   vxcptcause a3
  55   li a4,HWACHA_CAUSE_MISALIGNED_STORE
  56   bne a3,a4,fail
  57
  58   # check vec irq aux
  59   vxcptaux a3
  60   la a4,dest+1
  61   bne a3,a4,fail
  62
  63   # make sure vector unit has cleared out
  64   vsetcfg 32,0
  65   li a3,4
  66   vsetvl a3,a3
  67
  68   la a3,src1
  69   la a4,src2
  70   vld vx2,a3
  71   vld vx3,a4
  72   lui a0,%hi(vtcode2)
  73   vf %lo(vtcode2)(a0)
  74   la a5,dest
  75   vsd vx2,a5
  76   fence
  77
  78   ld a1,0(a5)
  79   li a2,5
  80   li x28,2
  81   bne a1,a2,fail
  82   ld a1,8(a5)
  83   li x28,3
  84   bne a1,a2,fail
  85   ld a1,16(a5)
  86   li x28,4
  87   bne a1,a2,fail
  88   ld a1,24(a5)
  89   li x28,5
  90   bne a1,a2,fail
  91
  92   TEST_PASSFAIL
  93
  94 RVTEST_CODE_END
  95
  96   .data
  97 RVTEST_DATA_BEGIN
  98
  99   TEST_DATA
 100
 101 src1:
 102   .dword 1
 103   .dword 2
 104   .dword 3
 105   .dword 4
 106 src2:
 107   .dword 4
 108   .dword 3
 109   .dword 2
 110   .dword 1
 111 dest:
 112   .dword 0xdeadbeefcafebabe
 113   .dword 0xdeadbeefcafebabe
 114   .dword 0xdeadbeefcafebabe
 115   .dword 0xdeadbeefcafebabe
 116
 117 RVTEST_DATA_END