Merge rv32ua tests into rv64ua
[riscv-tests.git] / isa / rv64ua / amoswap_d.S
1 # See LICENSE for license details.
2
3 #*****************************************************************************
4 # amoswap.d.S
5 #-----------------------------------------------------------------------------
6 #
7 # Test amoswap.d instruction.
8 #
9
10 #include "riscv_test.h"
11 #include "test_macros.h"
12
13 RVTEST_RV64U
14 RVTEST_CODE_BEGIN
15
16 TEST_CASE(2, a4, 0xffffffff80000000, \
17 li a0, 0xffffffff80000000; \
18 li a1, 0xfffffffffffff800; \
19 la a3, amo_operand; \
20 sd a0, 0(a3); \
21 nop; nop; nop; nop; \
22 nop; nop; nop; nop; \
23 nop; nop; nop; nop; \
24 nop; nop; nop; nop; \
25 nop; nop; nop; nop; \
26 nop; nop; nop; nop; \
27 nop; nop; nop; nop; \
28 amoswap.d a4, a1, 0(a3); \
29 )
30
31 TEST_CASE(3, a5, 0xfffffffffffff800, ld a5, 0(a3))
32
33 # try again after a cache miss
34 TEST_CASE(4, a4, 0xfffffffffffff800, \
35 li a1, 0x0000000080000000; \
36 li a4, 16384; \
37 add a5, a3, a4; \
38 ld x0, 0(a5); \
39 add a5, a5, a4; \
40 ld x0, 0(a5); \
41 add a5, a5, a4; \
42 ld x0, 0(a5); \
43 add a5, a5, a4; \
44 ld x0, 0(a5); \
45 amoswap.d a4, a1, 0(a3); \
46 )
47
48 TEST_CASE(5, a5, 0x0000000080000000, ld a5, 0(a3))
49
50 TEST_PASSFAIL
51
52 RVTEST_CODE_END
53
54 .data
55 RVTEST_DATA_BEGIN
56
57 TEST_DATA
58
59 RVTEST_DATA_END
60
61 .bss
62 .align 3
63 amo_operand:
64 .dword 0
65 .skip 65536