4a9178313d41e682f8c20c3d202838e89730fcc7
[riscv-tests.git] / isa / rv64uc / rvc.S
1 # See LICENSE for license details.
2
3 #*****************************************************************************
4 # rvc.S
5 #-----------------------------------------------------------------------------
6 #
7 # Test RVC corner cases.
8 #
9
10 #include "riscv_test.h"
11 #include "test_macros.h"
12
13 RVTEST_RV64U
14 RVTEST_CODE_BEGIN
15
16 .option push
17 .option norvc
18
19 #define RVC_TEST_CASE(n, r, v, code...) \
20 TEST_CASE (n, r, v, .option push; .option rvc; code; .option pop)
21
22 // Make sure fetching a 4-byte instruction across a page boundary works.
23 li TESTNUM, 2
24 li a1, 666
25 li a2, 1
26 RVC_TEST_CASE (2, a1, 2, \
27 j 1f; \
28 .align 3; \
29 data: \
30 .dword 0xfedcba9876543210; \
31 .dword 0xfedcba9876543210; \
32 .align 12; \
33 .skip 4094; \
34 1: addi a1, a2, 1)
35
36 li sp, 0x1234
37 RVC_TEST_CASE (3, a0, 0x1234 + 1020, c.addi4spn a0, sp, 1020)
38 RVC_TEST_CASE (4, sp, 0x1234 + 496, c.addi16sp sp, 496)
39 RVC_TEST_CASE (5, sp, 0x1234 + 496 - 512, c.addi16sp sp, -512)
40
41 la a1, data
42 RVC_TEST_CASE (6, a2, 0xfffffffffedcba99, c.lw a0, 4(a1); addi a0, a0, 1; c.sw a0, 4(a1); c.lw a2, 4(a1))
43 #ifdef __riscv64
44 RVC_TEST_CASE (7, a2, 0xfedcba9976543211, c.ld a0, 0(a1); addi a0, a0, 1; c.sd a0, 0(a1); c.ld a2, 0(a1))
45 #endif
46
47 RVC_TEST_CASE (8, a0, -15, ori a0, x0, 1; c.addi a0, -16)
48 RVC_TEST_CASE (9, a5, -16, ori a5, x0, 1; c.li a5, -16)
49 #ifdef __riscv64
50 RVC_TEST_CASE (10, a0, 0x76543210, ld a0, (a1); c.addiw a0, -1)
51 #endif
52
53 RVC_TEST_CASE (11, s0, 0xffffffffffffffe1, c.lui s0, 0xfffe1; c.srai s0, 12)
54 #ifdef __riscv64
55 RVC_TEST_CASE (12, s0, 0x000fffffffffffe1, c.lui s0, 0xfffe1; c.srli s0, 12)
56 #else
57 RVC_TEST_CASE (12, s0, 0x000fffe1, c.lui s0, 0xfffe1; c.srli s0, 12)
58 #endif
59 RVC_TEST_CASE (14, s0, ~0x11, c.li s0, -2; c.andi s0, ~0x10)
60 RVC_TEST_CASE (15, s1, 14, li s1, 20; li a0, 6; c.sub s1, a0)
61 RVC_TEST_CASE (16, s1, 18, li s1, 20; li a0, 6; c.xor s1, a0)
62 RVC_TEST_CASE (17, s1, 22, li s1, 20; li a0, 6; c.or s1, a0)
63 RVC_TEST_CASE (18, s1, 4, li s1, 20; li a0, 6; c.and s1, a0)
64 #ifdef __riscv64
65 RVC_TEST_CASE (19, s1, 0xffffffff80000000, li s1, 0x7fffffff; li a0, -1; c.subw s1, a0)
66 RVC_TEST_CASE (20, s1, 0xffffffff80000000, li s1, 0x7fffffff; li a0, 1; c.addw s1, a0)
67 #endif
68 RVC_TEST_CASE (21, s0, 0x12340, li s0, 0x1234; c.slli s0, 4)
69
70 RVC_TEST_CASE (30, ra, 0, \
71 li ra, 0; \
72 c.j 1f; \
73 c.j 2f; \
74 1:c.j 1f; \
75 2:j fail; \
76 1:)
77
78 RVC_TEST_CASE (31, x0, 0, \
79 li a0, 0; \
80 c.beqz a0, 1f; \
81 c.j 2f; \
82 1:c.j 1f; \
83 2:j fail; \
84 1:)
85
86 RVC_TEST_CASE (32, x0, 0, \
87 li a0, 1; \
88 c.bnez a0, 1f; \
89 c.j 2f; \
90 1:c.j 1f; \
91 2:j fail; \
92 1:)
93
94 RVC_TEST_CASE (33, x0, 0, \
95 li a0, 1; \
96 c.beqz a0, 1f; \
97 c.j 2f; \
98 1:c.j fail; \
99 2:)
100
101 RVC_TEST_CASE (34, x0, 0, \
102 li a0, 0; \
103 c.bnez a0, 1f; \
104 c.j 2f; \
105 1:c.j fail; \
106 2:)
107
108 RVC_TEST_CASE (35, ra, 0, \
109 la t0, 1f; \
110 li ra, 0; \
111 c.jr t0; \
112 c.j 2f; \
113 1:c.j 1f; \
114 2:j fail; \
115 1:)
116
117 RVC_TEST_CASE (36, ra, -2, \
118 la t0, 1f; \
119 li ra, 0; \
120 c.jalr t0; \
121 c.j 2f; \
122 1:c.j 1f; \
123 2:j fail; \
124 1:sub ra, ra, t0)
125
126 #ifdef __riscv32
127 RVC_TEST_CASE (37, ra, -2, \
128 la t0, 1f; \
129 li ra, 0; \
130 c.jal 1f; \
131 c.j 2f; \
132 1:c.j 1f; \
133 2:j fail; \
134 1:sub ra, ra, t0)
135 #endif
136
137 la sp, data
138 RVC_TEST_CASE (40, a2, 0xfffffffffedcba99, c.lwsp a0, 12(sp); addi a0, a0, 1; c.swsp a0, 12(sp); c.lwsp a2, 12(sp))
139 #ifdef __riscv64
140 RVC_TEST_CASE (41, a2, 0xfedcba9976543211, c.ldsp a0, 8(sp); addi a0, a0, 1; c.sdsp a0, 8(sp); c.ldsp a2, 8(sp))
141 #endif
142
143 RVC_TEST_CASE (42, t0, 0x246, li a0, 0x123; c.mv t0, a0; c.add t0, a0)
144
145 .option pop
146
147 TEST_PASSFAIL
148
149 RVTEST_CODE_END
150
151 .data
152 RVTEST_DATA_BEGIN
153
154 RVTEST_DATA_END