Improve RVC test
[riscv-tests.git] / isa / rv64uc / rvc.S
1 # See LICENSE for license details.
2
3 #*****************************************************************************
4 # rvc.S
5 #-----------------------------------------------------------------------------
6 #
7 # Test RVC corner cases.
8 #
9
10 #include "riscv_test.h"
11 #include "test_macros.h"
12
13 RVTEST_RV64U
14 RVTEST_CODE_BEGIN
15
16 .option push
17 .option norvc
18
19 #define RVC_TEST_CASE(n, r, v, code...) \
20 TEST_CASE (n, r, v, .option push; .option rvc; code; .option pop)
21
22 // Make sure fetching a 4-byte instruction across a page boundary works.
23 li TESTNUM, 2
24 li a1, 666
25 TEST_CASE (2, a1, 667, \
26 j 1f; \
27 .align 3; \
28 data: \
29 .dword 0xfedcba9876543210; \
30 .dword 0xfedcba9876543210; \
31 .align 12; \
32 .skip 4094; \
33 1: addi a1, a1, 1)
34
35 li sp, 0x1234
36 RVC_TEST_CASE (3, a0, 0x1234 + 1020, c.addi4spn a0, sp, 1020)
37 RVC_TEST_CASE (4, sp, 0x1234 + 496, c.addi16sp sp, 496)
38 RVC_TEST_CASE (5, sp, 0x1234 + 496 - 512, c.addi16sp sp, -512)
39
40 la a1, data
41 RVC_TEST_CASE (6, a2, 0xfffffffffedcba99, c.lw a0, 4(a1); addi a0, a0, 1; c.sw a0, 4(a1); c.lw a2, 4(a1))
42 #if __riscv_xlen == 64
43 RVC_TEST_CASE (7, a2, 0xfedcba9976543211, c.ld a0, 0(a1); addi a0, a0, 1; c.sd a0, 0(a1); c.ld a2, 0(a1))
44 #endif
45
46 RVC_TEST_CASE (8, a0, -15, ori a0, x0, 1; c.addi a0, -16)
47 RVC_TEST_CASE (9, a5, -16, ori a5, x0, 1; c.li a5, -16)
48 #if __riscv_xlen == 64
49 RVC_TEST_CASE (10, a0, 0x76543210, ld a0, (a1); c.addiw a0, -1)
50 #endif
51
52 RVC_TEST_CASE (11, s0, 0xffffffffffffffe1, c.lui s0, 0xfffe1; c.srai s0, 12)
53 #if __riscv_xlen == 64
54 RVC_TEST_CASE (12, s0, 0x000fffffffffffe1, c.lui s0, 0xfffe1; c.srli s0, 12)
55 #else
56 RVC_TEST_CASE (12, s0, 0x000fffe1, c.lui s0, 0xfffe1; c.srli s0, 12)
57 #endif
58 RVC_TEST_CASE (14, s0, ~0x11, c.li s0, -2; c.andi s0, ~0x10)
59 RVC_TEST_CASE (15, s1, 14, li s1, 20; li a0, 6; c.sub s1, a0)
60 RVC_TEST_CASE (16, s1, 18, li s1, 20; li a0, 6; c.xor s1, a0)
61 RVC_TEST_CASE (17, s1, 22, li s1, 20; li a0, 6; c.or s1, a0)
62 RVC_TEST_CASE (18, s1, 4, li s1, 20; li a0, 6; c.and s1, a0)
63 #if __riscv_xlen == 64
64 RVC_TEST_CASE (19, s1, 0xffffffff80000000, li s1, 0x7fffffff; li a0, -1; c.subw s1, a0)
65 RVC_TEST_CASE (20, s1, 0xffffffff80000000, li s1, 0x7fffffff; li a0, 1; c.addw s1, a0)
66 #endif
67 RVC_TEST_CASE (21, s0, 0x12340, li s0, 0x1234; c.slli s0, 4)
68
69 RVC_TEST_CASE (30, ra, 0, \
70 li ra, 0; \
71 c.j 1f; \
72 c.j 2f; \
73 1:c.j 1f; \
74 2:j fail; \
75 1:)
76
77 RVC_TEST_CASE (31, x0, 0, \
78 li a0, 0; \
79 c.beqz a0, 1f; \
80 c.j 2f; \
81 1:c.j 1f; \
82 2:j fail; \
83 1:)
84
85 RVC_TEST_CASE (32, x0, 0, \
86 li a0, 1; \
87 c.bnez a0, 1f; \
88 c.j 2f; \
89 1:c.j 1f; \
90 2:j fail; \
91 1:)
92
93 RVC_TEST_CASE (33, x0, 0, \
94 li a0, 1; \
95 c.beqz a0, 1f; \
96 c.j 2f; \
97 1:c.j fail; \
98 2:)
99
100 RVC_TEST_CASE (34, x0, 0, \
101 li a0, 0; \
102 c.bnez a0, 1f; \
103 c.j 2f; \
104 1:c.j fail; \
105 2:)
106
107 RVC_TEST_CASE (35, ra, 0, \
108 la t0, 1f; \
109 li ra, 0; \
110 c.jr t0; \
111 c.j 2f; \
112 1:c.j 1f; \
113 2:j fail; \
114 1:)
115
116 RVC_TEST_CASE (36, ra, -2, \
117 la t0, 1f; \
118 li ra, 0; \
119 c.jalr t0; \
120 c.j 2f; \
121 1:c.j 1f; \
122 2:j fail; \
123 1:sub ra, ra, t0)
124
125 #if __riscv_xlen == 32
126 RVC_TEST_CASE (37, ra, -2, \
127 la t0, 1f; \
128 li ra, 0; \
129 c.jal 1f; \
130 c.j 2f; \
131 1:c.j 1f; \
132 2:j fail; \
133 1:sub ra, ra, t0)
134 #endif
135
136 la sp, data
137 RVC_TEST_CASE (40, a2, 0xfffffffffedcba99, c.lwsp a0, 12(sp); addi a0, a0, 1; c.swsp a0, 12(sp); c.lwsp a2, 12(sp))
138 #if __riscv_xlen == 64
139 RVC_TEST_CASE (41, a2, 0xfedcba9976543211, c.ldsp a0, 8(sp); addi a0, a0, 1; c.sdsp a0, 8(sp); c.ldsp a2, 8(sp))
140 #endif
141
142 RVC_TEST_CASE (42, t0, 0x246, li a0, 0x123; c.mv t0, a0; c.add t0, a0)
143
144 .option pop
145
146 TEST_PASSFAIL
147
148 RVTEST_CODE_END
149
150 .data
151 RVTEST_DATA_BEGIN
152
153 RVTEST_DATA_END