isa/rv64ui/sh.S

   1 #*****************************************************************************
   2 # sh.S
   3 #-----------------------------------------------------------------------------
   4 #
   5 # Test sh instruction.
   6 #
   7
   8 #include "riscv_test.h"
   9 #include "test_macros.h"
  10
  11 RVTEST_RV64U
  12 RVTEST_CODE_BEGIN
  13
  14   #-------------------------------------------------------------
  15   # Basic tests
  16   #-------------------------------------------------------------
  17
  18   TEST_ST_OP( 2, lh, sh, 0x00000000000000aa, 0, tdat );
  19   TEST_ST_OP( 3, lh, sh, 0xffffffffffffaa00, 2, tdat );
  20 #ifdef __RISCVEL
  21   TEST_ST_OP( 4, lw, sh, 0xffffffffbeef0aa0, 4, tdat );
  22 #elif defined(__RISCVEB)
  23 #else
  24   TEST_ST_OP( 4, lw, sh, 0x000000000aa0beef, 4, tdat );
  25 #error unknown endianness!
  26 #endif
  27   TEST_ST_OP( 5, lh, sh, 0xffffffffffffa00a, 6, tdat );
  28
  29   # Test with negative offset
  30
  31   TEST_ST_OP( 6, lh, sh, 0x00000000000000aa, -6, tdat8 );
  32   TEST_ST_OP( 7, lh, sh, 0xffffffffffffaa00, -4, tdat8 );
  33   TEST_ST_OP( 8, lh, sh, 0x0000000000000aa0, -2, tdat8 );
  34   TEST_ST_OP( 9, lh, sh, 0xffffffffffffa00a, 0,  tdat8 );
  35
  36   # Test with a negative base
  37
  38   TEST_CASE( 10, x3, 0x5678, \
  39     la  x1, tdat9; \
  40     li  x2, 0x12345678; \
  41     addi x4, x1, -32; \
  42     sh x2, 32(x4); \
  43     lh x3, 0(x1); \
  44   )
  45
  46   # Test with unaligned base
  47
  48   TEST_CASE( 11, x3, 0x3098, \
  49     la  x1, tdat9; \
  50     li  x2, 0x00003098; \
  51     addi x1, x1, -5; \
  52     sh x2, 7(x1); \
  53     la  x4, tdat10; \
  54     lh x3, 0(x4); \
  55   )
  56
  57   #-------------------------------------------------------------
  58   # Bypassing tests
  59   #-------------------------------------------------------------
  60
  61   TEST_ST_SRC12_BYPASS( 12, 0, 0, lh, sh, 0xffffffffffffccdd, 0,  tdat );
  62   TEST_ST_SRC12_BYPASS( 13, 0, 1, lh, sh, 0xffffffffffffbccd, 2,  tdat );
  63   TEST_ST_SRC12_BYPASS( 14, 0, 2, lh, sh, 0xffffffffffffbbcc, 4,  tdat );
  64   TEST_ST_SRC12_BYPASS( 15, 1, 0, lh, sh, 0xffffffffffffabbc, 6, tdat );
  65   TEST_ST_SRC12_BYPASS( 16, 1, 1, lh, sh, 0xffffffffffffaabb, 8, tdat );
  66   TEST_ST_SRC12_BYPASS( 17, 2, 0, lh, sh, 0xffffffffffffdaab, 10, tdat );
  67
  68   TEST_ST_SRC21_BYPASS( 18, 0, 0, lh, sh, 0x2233, 0,  tdat );
  69   TEST_ST_SRC21_BYPASS( 19, 0, 1, lh, sh, 0x1223, 2,  tdat );
  70   TEST_ST_SRC21_BYPASS( 20, 0, 2, lh, sh, 0x1122, 4,  tdat );
  71   TEST_ST_SRC21_BYPASS( 21, 1, 0, lh, sh, 0x0112, 6, tdat );
  72   TEST_ST_SRC21_BYPASS( 22, 1, 1, lh, sh, 0x0011, 8, tdat );
  73   TEST_ST_SRC21_BYPASS( 23, 2, 0, lh, sh, 0x3001, 10, tdat );
  74
  75   li a0, 0xbeef
  76   la a1, tdat
  77   sh a0, 6(a1)
  78
  79   TEST_PASSFAIL
  80
  81 RVTEST_CODE_END
  82
  83   .data
  84 RVTEST_DATA_BEGIN
  85
  86   TEST_DATA
  87
  88 tdat:
  89 tdat1:  .half 0xbeef
  90 tdat2:  .half 0xbeef
  91 tdat3:  .half 0xbeef
  92 tdat4:  .half 0xbeef
  93 tdat5:  .half 0xbeef
  94 tdat6:  .half 0xbeef
  95 tdat7:  .half 0xbeef
  96 tdat8:  .half 0xbeef
  97 tdat9:  .half 0xbeef
  98 tdat10: .half 0xbeef
  99
 100 RVTEST_DATA_END