0ed888b449892ca072d6a5e520ba85871343f931
[riscv-tests.git] / isa / rv64ui / slliw.S
1 # See LICENSE for license details.
2
3 #*****************************************************************************
4 # slliw.S
5 #-----------------------------------------------------------------------------
6 #
7 # Test slliw instruction.
8 #
9
10 #include "riscv_test.h"
11 #include "test_macros.h"
12
13 RVTEST_RV64U
14 RVTEST_CODE_BEGIN
15
16 #-------------------------------------------------------------
17 # Arithmetic tests
18 #-------------------------------------------------------------
19
20 TEST_IMM_OP( 2, slliw, 0x0000000000000001, 0x0000000000000001, 0 );
21 TEST_IMM_OP( 3, slliw, 0x0000000000000002, 0x0000000000000001, 1 );
22 TEST_IMM_OP( 4, slliw, 0x0000000000000080, 0x0000000000000001, 7 );
23 TEST_IMM_OP( 5, slliw, 0x0000000000004000, 0x0000000000000001, 14 );
24 TEST_IMM_OP( 6, slliw, 0xffffffff80000000, 0x0000000000000001, 31 );
25
26 TEST_IMM_OP( 7, slliw, 0xffffffffffffffff, 0xffffffffffffffff, 0 );
27 TEST_IMM_OP( 8, slliw, 0xfffffffffffffffe, 0xffffffffffffffff, 1 );
28 TEST_IMM_OP( 9, slliw, 0xffffffffffffff80, 0xffffffffffffffff, 7 );
29 TEST_IMM_OP( 10, slliw, 0xffffffffffffc000, 0xffffffffffffffff, 14 );
30 TEST_IMM_OP( 11, slliw, 0xffffffff80000000, 0xffffffffffffffff, 31 );
31
32 TEST_IMM_OP( 12, slliw, 0x0000000021212121, 0x0000000021212121, 0 );
33 TEST_IMM_OP( 13, slliw, 0x0000000042424242, 0x0000000021212121, 1 );
34 TEST_IMM_OP( 14, slliw, 0xffffffff90909080, 0x0000000021212121, 7 );
35 TEST_IMM_OP( 15, slliw, 0x0000000048484000, 0x0000000021212121, 14 );
36 TEST_IMM_OP( 16, slliw, 0xffffffff80000000, 0x0000000021212121, 31 );
37
38 # Verify that shifts ignore top 32 (using true 64-bit values)
39
40 TEST_IMM_OP( 44, slliw, 0x0000000012345678, 0xffffffff12345678, 0 );
41 TEST_IMM_OP( 45, slliw, 0x0000000023456780, 0xffffffff12345678, 4 );
42 TEST_IMM_OP( 46, slliw, 0xffffffff92345678, 0x0000000092345678, 0 );
43 TEST_IMM_OP( 47, slliw, 0xffffffff93456780, 0x0000000099345678, 4 );
44
45 #-------------------------------------------------------------
46 # Source/Destination tests
47 #-------------------------------------------------------------
48
49 TEST_IMM_SRC1_EQ_DEST( 17, slliw, 0x00000080, 0x00000001, 7 );
50
51 #-------------------------------------------------------------
52 # Bypassing tests
53 #-------------------------------------------------------------
54
55 TEST_IMM_DEST_BYPASS( 18, 0, slliw, 0x0000000000000080, 0x0000000000000001, 7 );
56 TEST_IMM_DEST_BYPASS( 19, 1, slliw, 0x0000000000004000, 0x0000000000000001, 14 );
57 TEST_IMM_DEST_BYPASS( 20, 2, slliw, 0xffffffff80000000, 0x0000000000000001, 31 );
58
59 TEST_IMM_SRC1_BYPASS( 21, 0, slliw, 0x0000000000000080, 0x0000000000000001, 7 );
60 TEST_IMM_SRC1_BYPASS( 22, 1, slliw, 0x0000000000004000, 0x0000000000000001, 14 );
61 TEST_IMM_SRC1_BYPASS( 23, 2, slliw, 0xffffffff80000000, 0x0000000000000001, 31 );
62
63 TEST_IMM_ZEROSRC1( 24, slliw, 0, 31 );
64 TEST_IMM_ZERODEST( 25, slliw, 31, 28 );
65
66 TEST_PASSFAIL
67
68 RVTEST_CODE_END
69
70 .data
71 RVTEST_DATA_BEGIN
72
73 TEST_DATA
74
75 RVTEST_DATA_END