isa/rv64ui/sllw.S

   1 # See LICENSE for license details.
   2
   3 #*****************************************************************************
   4 # sllw.S
   5 #-----------------------------------------------------------------------------
   6 #
   7 # Test sllw instruction.
   8 #
   9
  10 #include "riscv_test.h"
  11 #include "test_macros.h"
  12
  13 RVTEST_RV64U
  14 RVTEST_CODE_BEGIN
  15
  16   #-------------------------------------------------------------
  17   # Arithmetic tests
  18   #-------------------------------------------------------------
  19
  20   TEST_RR_OP( 2,  sllw, 0x0000000000000001, 0x0000000000000001, 0  );
  21   TEST_RR_OP( 3,  sllw, 0x0000000000000002, 0x0000000000000001, 1  );
  22   TEST_RR_OP( 4,  sllw, 0x0000000000000080, 0x0000000000000001, 7  );
  23   TEST_RR_OP( 5,  sllw, 0x0000000000004000, 0x0000000000000001, 14 );
  24   TEST_RR_OP( 6,  sllw, 0xffffffff80000000, 0x0000000000000001, 31 );
  25
  26   TEST_RR_OP( 7,  sllw, 0xffffffffffffffff, 0xffffffffffffffff, 0  );
  27   TEST_RR_OP( 8,  sllw, 0xfffffffffffffffe, 0xffffffffffffffff, 1  );
  28   TEST_RR_OP( 9,  sllw, 0xffffffffffffff80, 0xffffffffffffffff, 7  );
  29   TEST_RR_OP( 10, sllw, 0xffffffffffffc000, 0xffffffffffffffff, 14 );
  30   TEST_RR_OP( 11, sllw, 0xffffffff80000000, 0xffffffffffffffff, 31 );
  31
  32   TEST_RR_OP( 12, sllw, 0x0000000021212121, 0x0000000021212121, 0  );
  33   TEST_RR_OP( 13, sllw, 0x0000000042424242, 0x0000000021212121, 1  );
  34   TEST_RR_OP( 14, sllw, 0xffffffff90909080, 0x0000000021212121, 7  );
  35   TEST_RR_OP( 15, sllw, 0x0000000048484000, 0x0000000021212121, 14 );
  36   TEST_RR_OP( 16, sllw, 0xffffffff80000000, 0x0000000021212121, 31 );
  37
  38   # Verify that shifts only use bottom five bits
  39
  40   TEST_RR_OP( 17, sllw, 0x0000000021212121, 0x0000000021212121, 0xffffffffffffffe0 );
  41   TEST_RR_OP( 18, sllw, 0x0000000042424242, 0x0000000021212121, 0xffffffffffffffe1 );
  42   TEST_RR_OP( 19, sllw, 0xffffffff90909080, 0x0000000021212121, 0xffffffffffffffe7 );
  43   TEST_RR_OP( 20, sllw, 0x0000000048484000, 0x0000000021212121, 0xffffffffffffffee );
  44   TEST_RR_OP( 21, sllw, 0xffffffff80000000, 0x0000000021212121, 0xffffffffffffffff );
  45
  46   # Verify that shifts ignore top 32 (using true 64-bit values)
  47
  48   TEST_RR_OP( 44, sllw, 0x0000000012345678, 0xffffffff12345678, 0 );
  49   TEST_RR_OP( 45, sllw, 0x0000000023456780, 0xffffffff12345678, 4 );
  50   TEST_RR_OP( 46, sllw, 0xffffffff92345678, 0x0000000092345678, 0 );
  51   TEST_RR_OP( 47, sllw, 0xffffffff93456780, 0x0000000099345678, 4 );
  52
  53   #-------------------------------------------------------------
  54   # Source/Destination tests
  55   #-------------------------------------------------------------
  56
  57   TEST_RR_SRC1_EQ_DEST( 22, sllw, 0x00000080, 0x00000001, 7  );
  58   TEST_RR_SRC2_EQ_DEST( 23, sllw, 0x00004000, 0x00000001, 14 );
  59   TEST_RR_SRC12_EQ_DEST( 24, sllw, 24, 3 );
  60
  61   #-------------------------------------------------------------
  62   # Bypassing tests
  63   #-------------------------------------------------------------
  64
  65   TEST_RR_DEST_BYPASS( 25, 0, sllw, 0x0000000000000080, 0x0000000000000001, 7  );
  66   TEST_RR_DEST_BYPASS( 26, 1, sllw, 0x0000000000004000, 0x0000000000000001, 14 );
  67   TEST_RR_DEST_BYPASS( 27, 2, sllw, 0xffffffff80000000, 0x0000000000000001, 31 );
  68
  69   TEST_RR_SRC12_BYPASS( 28, 0, 0, sllw, 0x0000000000000080, 0x0000000000000001, 7  );
  70   TEST_RR_SRC12_BYPASS( 29, 0, 1, sllw, 0x0000000000004000, 0x0000000000000001, 14 );
  71   TEST_RR_SRC12_BYPASS( 30, 0, 2, sllw, 0xffffffff80000000, 0x0000000000000001, 31 );
  72   TEST_RR_SRC12_BYPASS( 31, 1, 0, sllw, 0x0000000000000080, 0x0000000000000001, 7  );
  73   TEST_RR_SRC12_BYPASS( 32, 1, 1, sllw, 0x0000000000004000, 0x0000000000000001, 14 );
  74   TEST_RR_SRC12_BYPASS( 33, 2, 0, sllw, 0xffffffff80000000, 0x0000000000000001, 31 );
  75
  76   TEST_RR_SRC21_BYPASS( 34, 0, 0, sllw, 0x0000000000000080, 0x0000000000000001, 7  );
  77   TEST_RR_SRC21_BYPASS( 35, 0, 1, sllw, 0x0000000000004000, 0x0000000000000001, 14 );
  78   TEST_RR_SRC21_BYPASS( 36, 0, 2, sllw, 0xffffffff80000000, 0x0000000000000001, 31 );
  79   TEST_RR_SRC21_BYPASS( 37, 1, 0, sllw, 0x0000000000000080, 0x0000000000000001, 7  );
  80   TEST_RR_SRC21_BYPASS( 38, 1, 1, sllw, 0x0000000000004000, 0x0000000000000001, 14 );
  81   TEST_RR_SRC21_BYPASS( 39, 2, 0, sllw, 0xffffffff80000000, 0x0000000000000001, 31 );
  82
  83   TEST_RR_ZEROSRC1( 40, sllw, 0, 15 );
  84   TEST_RR_ZEROSRC2( 41, sllw, 32, 32 );
  85   TEST_RR_ZEROSRC12( 42, sllw, 0 );
  86   TEST_RR_ZERODEST( 43, sllw, 1024, 2048 );
  87
  88   TEST_PASSFAIL
  89
  90 RVTEST_CODE_END
  91
  92   .data
  93 RVTEST_DATA_BEGIN
  94
  95   TEST_DATA
  96
  97 RVTEST_DATA_END