Add LICENSE
[riscv-tests.git] / isa / rv64uv / amomin_d.S
1 # See LICENSE for license details.
2
3 #*****************************************************************************
4 # amomin_d.S
5 #-----------------------------------------------------------------------------
6 #
7 # Test amomin.d instruction in a vf block.
8 #
9
10 #include "riscv_test.h"
11 #include "test_macros.h"
12
13 RVTEST_RV64UV
14 RVTEST_CODE_BEGIN
15
16 vsetcfg 4,0
17 li a4,2048
18 vsetvl a4,a4
19
20 la a5,amodest
21 vmsv vx2,a5
22 lui a0,%hi(vtcode)
23 vf %lo(vtcode)(a0)
24 la a6,dest
25 vsd vx1,a6
26 fence
27
28 li a1,0
29 li a2,-1
30 loop:
31 ld a0,0(a5)
32 addi TESTNUM,a1,2
33 bne a0,a2,fail
34 addi a5,a5,8
35 addi a1,a1,1
36 addi a2,a2,-1
37 bne a1,a4,loop
38 j pass
39
40 vtcode:
41 utidx x3
42 slli x3, x3, 3
43 add x2, x2, x3
44 utidx x3
45 addi x3,x3,1
46 li x1,-1
47 mul x3,x3,x1
48 amomin.d x1,x3,0(x2)
49 stop
50
51 TEST_PASSFAIL
52
53 RVTEST_CODE_END
54
55 .data
56 RVTEST_DATA_BEGIN
57
58 TEST_DATA
59
60 amodest:
61 .skip 16384
62 dest:
63 .skip 16384
64
65 RVTEST_DATA_END