Merge branch 'master' of github.com:ucb-bar/riscv-tests
[riscv-tests.git] / isa / rv64uv / amoxor_d.S
1 #*****************************************************************************
2 # amoxor_d.S
3 #-----------------------------------------------------------------------------
4 #
5 # Test amoxor.d instruction in a vf block.
6 #
7
8 #include "riscv_test.h"
9 #include "test_macros.h"
10
11 RVTEST_RV64UV
12 RVTEST_CODE_BEGIN
13
14 vsetcfg 4,0
15 li a4,2048
16 vsetvl a4,a4
17
18 la a5,amodest
19 vmsv vx2,a5
20 lui a0,%hi(vtcode)
21 vf %lo(vtcode)(a0)
22 la a6,dest
23 vsd vx1,a6
24 fence
25
26 li a1,0
27 li a2,-1
28 li t0,0xaaaaaaaaaaaaaaaa
29 loop:
30 ld a0,0(a6)
31 addi TESTNUM,a1,2
32 bne a0,a2,fail
33 addi a6,a6,8
34 addi a1,a1,1
35 xor a2,a2,t0
36 bne a1,a4,loop
37 j pass
38
39 vtcode:
40 li x3,0xaaaaaaaaaaaaaaaa
41 amoxor.d x1,x3,0(x2)
42 stop
43
44 TEST_PASSFAIL
45
46 RVTEST_CODE_END
47
48 .data
49 RVTEST_DATA_BEGIN
50
51 TEST_DATA
52
53 amodest:
54 .dword -1
55 dest:
56 .skip 16384
57
58 RVTEST_DATA_END