4f55cdcec4cf2501d79768f397b6bb34b033d57e
[riscv-tests.git] / isa / rv64uv / fmovz.S
1 #*****************************************************************************
2 # fmovz.S
3 #-----------------------------------------------------------------------------
4 #
5 # Test fmovz instruction in a vf block.
6 #
7
8 #include "riscv_test.h"
9 #include "test_macros.h"
10
11 RVTEST_RV64UV
12 RVTEST_CODE_BEGIN
13
14 vsetcfg 4,2
15 li a6,2048
16 vsetvl a6,a6
17
18 lui a0,%hi(vtcode)
19 vf %lo(vtcode)(a0)
20 la a7,dest
21 vfsd vf0,a7
22 fence
23
24 li a1,0
25 li a2,-1
26 loop:
27 ld a0,0(a7)
28 slti a4,a1,10
29 slli a4,a4,63
30 srai a4,a4,63
31 xori a4,a4,-1
32 and a5,a2,a4
33 addi TESTNUM,a1,2
34 bne a0,a5,fail
35 addi a7,a7,8
36 addi a1,a1,1
37 bne a1,a6,loop
38 j pass
39
40 vtcode:
41 utidx x1
42 slti x2,x1,10
43 li x1,-1
44 li x3,0
45 fmv.d.x f0,x3
46 fmv.d.x f1,x1
47 fmovz f0,x2,f1
48 stop
49
50 TEST_PASSFAIL
51
52 RVTEST_CODE_END
53
54 .data
55 RVTEST_DATA_BEGIN
56
57 TEST_DATA
58
59 dest:
60 .skip 16384
61
62 RVTEST_DATA_END