Add a top-level make clean target.
[riscv-tests.git] / isa / rv64uv / fmovz.S
1 # See LICENSE for license details.
2
3 #*****************************************************************************
4 # fmovz.S
5 #-----------------------------------------------------------------------------
6 #
7 # Test fmovz instruction in a vf block.
8 #
9
10 #include "riscv_test.h"
11 #include "test_macros.h"
12
13 RVTEST_RV64UV
14 RVTEST_CODE_BEGIN
15
16 vsetcfg 4,2
17 li a6,2048
18 vsetvl a6,a6
19
20 lui a0,%hi(vtcode)
21 vf %lo(vtcode)(a0)
22 la a7,dest
23 vfsd vf0,a7
24 fence
25
26 li a1,0
27 li a2,-1
28 loop:
29 ld a0,0(a7)
30 slti a4,a1,10
31 slli a4,a4,63
32 srai a4,a4,63
33 xori a4,a4,-1
34 and a5,a2,a4
35 addi TESTNUM,a1,2
36 bne a0,a5,fail
37 addi a7,a7,8
38 addi a1,a1,1
39 bne a1,a6,loop
40 j pass
41
42 vtcode:
43 utidx x1
44 slti x2,x1,10
45 li x1,-1
46 li x3,0
47 fmv.d.x f0,x3
48 fmv.d.x f1,x1
49 fmovz f0,x2,f1
50 stop
51
52 TEST_PASSFAIL
53
54 RVTEST_CODE_END
55
56 .data
57 RVTEST_DATA_BEGIN
58
59 TEST_DATA
60
61 dest:
62 .skip 16384
63
64 RVTEST_DATA_END