Add another FP recoding test case
[riscv-tests.git] / isa / rv64uv / fsd.S
1 # See LICENSE for license details.
2
3 #*****************************************************************************
4 # fsd.S
5 #-----------------------------------------------------------------------------
6 #
7 # Test fsd instruction in a vf block.
8 #
9
10 #include "riscv_test.h"
11 #include "test_macros.h"
12
13 RVTEST_RV64UV
14 RVTEST_CODE_BEGIN
15
16 vsetcfg 4,1
17 li a4,2048
18 vsetvl a4,a4
19
20 la a5,src
21 vfld vf0,a5
22 la a6,dest
23 vmsv vx2,a6
24 lui a0,%hi(vtcode)
25 vf %lo(vtcode)(a0)
26 fence
27
28 li a2,0
29 loop:
30 ld a0,0(a6)
31 addi TESTNUM,a2,2
32 ld a1,0(a5)
33 bne a0,a1,fail
34 addi a6,a6,8
35 addi a5,a5,8
36 addi a2,a2,1
37 bne a2,a4,loop
38 j pass
39
40 vtcode:
41 utidx x3
42 slli x3,x3,3
43 add x2,x2,x3
44 fsd f0,0(x2)
45 stop
46
47 TEST_PASSFAIL
48
49 RVTEST_CODE_END
50
51 .data
52 RVTEST_DATA_BEGIN
53
54 TEST_DATA
55
56 src:
57 #include "data_fd.h"
58
59 dest:
60 .skip 16384
61
62 RVTEST_DATA_END