initial commit
[riscv-tests.git] / isa / rv64uv / movz.S
1 #*****************************************************************************
2 # movz.S
3 #-----------------------------------------------------------------------------
4 #
5 # Test movz instruction in a vf block.
6 #
7
8 #include "riscv_test.h"
9 #include "test_macros.h"
10
11 RVTEST_RV64U
12 RVTEST_CODE_BEGIN
13
14 li a6,2048
15 vvcfgivl a6,a6,4,0
16
17 lui a0,%hi(vtcode)
18 vf %lo(vtcode)(a0)
19 la a7,dest
20 vsd vx3,a7
21 fence.v.l
22
23 li a1,0
24 li a2,-1
25 loop:
26 ld a0,0(a7)
27 slti a4,a1,10
28 slli a4,a4,63
29 srai a4,a4,63
30 xori a4,a4,-1
31 and a5,a2,a4
32 addi x28,a1,2
33 bne a0,a5,fail
34 addi a7,a7,8
35 addi a1,a1,1
36 bne a1,a6,loop
37 j pass
38
39 vtcode:
40 utidx x1
41 slti x2,x1,10
42 li x1,-1
43 li x3,0
44 movz x3,x2,x1
45 stop
46
47 TEST_PASSFAIL
48
49 RVTEST_CODE_END
50
51 .data
52 RVTEST_DATA_BEGIN
53
54 TEST_DATA
55
56 dest:
57 .skip 16384
58
59 RVTEST_DATA_END