773188dc61a03877822fe6d876237c8b99b606c8
[riscv-tests.git] / isa / rv64uv / vmsv.S
1 #*****************************************************************************
2 # vmsv.S
3 #-----------------------------------------------------------------------------
4 #
5 # Test vmsv instruction.
6 #
7
8 #include "riscv_test.h"
9 #include "test_macros.h"
10
11 RVTEST_RV64UV
12 RVTEST_CODE_BEGIN
13
14 vsetcfg 3,0
15 li a2,2048
16 vsetvl a2,a2
17
18 li a3,-1
19 vmsv vx2,a3
20 lui a0,%hi(vtcode)
21 vf %lo(vtcode)(a0)
22 la a4,dest
23 vsd vx2,a4
24 fence
25
26 li a1,0
27 loop:
28 ld a0,0(a4)
29 addi TESTNUM,a1,2
30 bne a0,a1,fail
31 addi a4,a4,8
32 addi a1,a1,1
33 bne a1,a2,loop
34 j pass
35
36 vtcode:
37 utidx x1
38 addi x1,x1,1
39 add x2,x1,x2
40 stop
41
42 TEST_PASSFAIL
43
44 RVTEST_CODE_END
45
46 .data
47 RVTEST_DATA_BEGIN
48
49 TEST_DATA
50
51 dest:
52 .skip 16384
53
54 RVTEST_DATA_END