initial commit
[riscv-tests.git] / isa / rv64uv / vmvv.S
1 #*****************************************************************************
2 # vmvv.S
3 #-----------------------------------------------------------------------------
4 #
5 # Test vmvv instruction.
6 #
7
8 #include "riscv_test.h"
9 #include "test_macros.h"
10
11 RVTEST_RV64U
12 RVTEST_CODE_BEGIN
13
14 li a2,2048
15 vvcfgivl a2,a2,3,0
16
17 lui a0,%hi(vtcode)
18 vf %lo(vtcode)(a0)
19 vmvv vx2,vx1
20 la a4,dest
21 vsd vx2,a4
22 fence.v.l
23
24 li a1,1
25 loop:
26 ld a0,0(a4)
27 addi x28,a1,2
28 bne a0,a1,fail
29 addi a4,a4,8
30 addi a1,a1,1
31 bne a1,a2,loop
32 j pass
33
34 vtcode:
35 utidx x1
36 addi x1,x1,1
37 stop
38
39 TEST_PASSFAIL
40
41 RVTEST_CODE_END
42
43 .data
44 RVTEST_DATA_BEGIN
45
46 TEST_DATA
47
48 dest:
49 .skip 16384
50
51 RVTEST_DATA_END