be1adb3c07b2cfba4880bb5d37cf4040e00320f2
[riscv-tests.git] / isa / rv64uv / vmvv.S
1 #*****************************************************************************
2 # vmvv.S
3 #-----------------------------------------------------------------------------
4 #
5 # Test vmvv instruction.
6 #
7
8 #include "riscv_test.h"
9 #include "test_macros.h"
10
11 RVTEST_RV64UV
12 RVTEST_CODE_BEGIN
13
14 vsetcfg 3,0
15 li a2,2048
16 vsetvl a2,a2
17
18 lui a0,%hi(vtcode)
19 vf %lo(vtcode)(a0)
20 vmvv vx2,vx1
21 la a4,dest
22 vsd vx2,a4
23 fence
24
25 li a1,1
26 loop:
27 ld a0,0(a4)
28 addi x28,a1,2
29 bne a0,a1,fail
30 addi a4,a4,8
31 addi a1,a1,1
32 bne a1,a2,loop
33 j pass
34
35 vtcode:
36 utidx x1
37 addi x1,x1,1
38 stop
39
40 TEST_PASSFAIL
41
42 RVTEST_CODE_END
43
44 .data
45 RVTEST_DATA_BEGIN
46
47 TEST_DATA
48
49 dest:
50 .skip 16384
51
52 RVTEST_DATA_END