isa/rv64uv/vvadd_branch.S

   1 #*****************************************************************************
   2 # vvadd_branch.S
   3 #-----------------------------------------------------------------------------
   4 #
   5 # Test vvadd branch.
   6 #
   7
   8 #include "riscv_test.h"
   9 #include "test_macros.h"
  10
  11 RVTEST_RV64UV
  12 RVTEST_CODE_BEGIN
  13
  14   vsetcfg 32,0
  15   li a3,4
  16   vsetvl a3,a3
  17
  18   la a3,src1
  19   la a4,src2
  20   vld vx2,a3
  21   vld vx3,a4
  22   lui a0,%hi(vtcode1)
  23   vf %lo(vtcode1)(a0)
  24   la a5,dest
  25   vsd vx2,a5
  26   fence
  27
  28   ld a1,0(a5)
  29   li a2,8
  30   li TESTNUM,2
  31   bne a1,a2,fail
  32   ld a1,8(a5)
  33   li a2, 6
  34   li TESTNUM,3
  35   bne a1,a2,fail
  36   ld a1,16(a5)
  37   li a2, 4
  38   li TESTNUM,4
  39   bne a1,a2,fail
  40   li a2, 2
  41   ld a1,24(a5)
  42   li TESTNUM,5
  43   bne a1,a2,fail
  44
  45   la a3,src1
  46   vld vx4,a3
  47   li a4, 3
  48   vmsv vx5,a4
  49   lui a0,%hi(vtcode2)
  50   vf %lo(vtcode2)(a0)
  51   la a5,dest
  52   vsd vx4,a5
  53   fence
  54
  55   ld a1,0(a5)
  56   li a2,1
  57   li TESTNUM,6
  58   bne a1,a2,fail
  59   ld a1,8(a5)
  60   li a2,2
  61   li TESTNUM,7
  62   bne a1,a2,fail
  63   ld a1,16(a5)
  64   li a2,0
  65   li TESTNUM,8
  66   bne a1,a2,fail
  67   ld a1,24(a5)
  68   li a2,0
  69   li TESTNUM,9
  70   bne a1,a2,fail
  71
  72   la a3,src2
  73   vld vx5,a3
  74   lui a0,%hi(vtcode3)
  75   vf %lo(vtcode3)(a0)
  76   la a5,dest
  77   vsd vx5,a5
  78   fence
  79
  80   ld a1,0(a5)
  81   li a2,4
  82   li TESTNUM,6
  83   bne a1,a2,fail
  84   ld a1,8(a5)
  85   li a2,3
  86   li TESTNUM,7
  87   bne a1,a2,fail
  88   ld a1,16(a5)
  89   li a2,2
  90   li TESTNUM,8
  91   bne a1,a2,fail
  92   ld a1,24(a5)
  93   li a2,1
  94   li TESTNUM,9
  95   bne a1,a2,fail
  96
  97   j pass
  98
  99 vtcode1:
 100   beq x2, x2, end
 101   add x2,x2,x3
 102 end:    add x2, x3, x3
 103   stop
 104
 105 vtcode2:
 106   blt x4, x5, end2
 107   add x4, x0, x0
 108 end2:   add x4, x4, x0
 109   stop
 110
 111 vtcode3:
 112   bge x5, x0, end3
 113   add x5, x0, x0
 114 end3:   add x5, x5,x0
 115   stop
 116
 117   TEST_PASSFAIL
 118
 119 RVTEST_CODE_END
 120
 121   .data
 122 RVTEST_DATA_BEGIN
 123
 124   TEST_DATA
 125
 126 src1:
 127   .dword 1
 128   .dword 2
 129   .dword 3
 130   .dword 4
 131 src2:
 132   .dword 4
 133   .dword 3
 134   .dword 2
 135   .dword 1
 136 dest:
 137   .dword 0xdeadbeefcafebabe
 138   .dword 0xdeadbeefcafebabe
 139   .dword 0xdeadbeefcafebabe
 140   .dword 0xdeadbeefcafebabe
 141
 142 RVTEST_DATA_END