Add LICENSE
[riscv-tests.git] / isa / rv64uv / vvadd_d.S
1 # See LICENSE for license details.
2
3 #*****************************************************************************
4 # vvadd_d.S
5 #-----------------------------------------------------------------------------
6 #
7 # Test vvadd d.
8 #
9
10 #include "riscv_test.h"
11 #include "test_macros.h"
12
13 RVTEST_RV64UV
14 RVTEST_CODE_BEGIN
15
16 vsetcfg 32,0
17 li a3,4
18 vsetvl a3,a3
19
20 la a3,src1
21 la a4,src2
22 vld vx2,a3
23 vld vx3,a4
24 lui a0,%hi(vtcode1)
25 vf %lo(vtcode1)(a0)
26 la a5,dest
27 vsd vx2,a5
28 fence
29
30 ld a1,0(a5)
31 li a2,5
32 li TESTNUM,2
33 bne a1,a2,fail
34 ld a1,8(a5)
35 li TESTNUM,3
36 bne a1,a2,fail
37 ld a1,16(a5)
38 li TESTNUM,4
39 bne a1,a2,fail
40 ld a1,24(a5)
41 li TESTNUM,5
42 bne a1,a2,fail
43
44 la a3,src1
45 vld vx4,a3
46 lui a0,%hi(vtcode2)
47 vf %lo(vtcode2)(a0)
48 la a5,dest
49 vsd vx4,a5
50 fence
51
52 ld a1,0(a5)
53 li a2,1
54 li TESTNUM,6
55 bne a1,a2,fail
56 ld a1,8(a5)
57 li a2,2
58 li TESTNUM,7
59 bne a1,a2,fail
60 ld a1,16(a5)
61 li a2,3
62 li TESTNUM,8
63 bne a1,a2,fail
64 ld a1,24(a5)
65 li a2,4
66 li TESTNUM,9
67 bne a1,a2,fail
68
69 la a3,src2
70 vld vx5,a3
71 lui a0,%hi(vtcode3)
72 vf %lo(vtcode3)(a0)
73 la a5,dest
74 vsd vx5,a5
75 fence
76
77 ld a1,0(a5)
78 li a2,4
79 li TESTNUM,6
80 bne a1,a2,fail
81 ld a1,8(a5)
82 li a2,3
83 li TESTNUM,7
84 bne a1,a2,fail
85 ld a1,16(a5)
86 li a2,2
87 li TESTNUM,8
88 bne a1,a2,fail
89 ld a1,24(a5)
90 li a2,1
91 li TESTNUM,9
92 bne a1,a2,fail
93
94 j pass
95
96 vtcode1:
97 add x2,x2,x3
98 stop
99
100 vtcode2:
101 add a0,a0,x0
102 stop
103
104 vtcode3:
105 add a1,a1,x0
106 stop
107
108 TEST_PASSFAIL
109
110 RVTEST_CODE_END
111
112 .data
113 RVTEST_DATA_BEGIN
114
115 TEST_DATA
116
117 src1:
118 .dword 1
119 .dword 2
120 .dword 3
121 .dword 4
122 src2:
123 .dword 4
124 .dword 3
125 .dword 2
126 .dword 1
127 dest:
128 .dword 0xdeadbeefcafebabe
129 .dword 0xdeadbeefcafebabe
130 .dword 0xdeadbeefcafebabe
131 .dword 0xdeadbeefcafebabe
132
133 RVTEST_DATA_END