li t0, MSTATUS_FS; csrs mstatus, t0 # enable FPU
li t0, MSTATUS_XS; csrs mstatus, t0 # enable accelerator
- li t0, ((MSTATUS64_UA & ~(MSTATUS64_UA << 1)) * UA_RV64) >> 31
- sll t0, t0, 31
- li t1, ((MSTATUS64_SA & ~(MSTATUS64_SA << 1)) * UA_RV64) >> 31
- sll t1, t1, 31
#ifdef __riscv64
+ csrr t0, mcpuid
# make sure processor supports RV64 if this was compiled for RV64
- bnez t0, 1f
+ bltz t0, 1f
li a0, 1234
j tohost_exit
1:
- # enable RV64 for user and supervisor
- csrs mstatus, t0
- csrs mstatus, t1
-#else
- # disable RV64 for user and supervisor
- csrc mstatus, t0
- csrc mstatus, t1
#endif
csrr t0, mstatus
and tp, tp, -64
# get core id
- csrr a0, hartid
+ csrr a0, mhartid
# for now, assume only 1 core
li a1, 1
1:bgeu a0, a1, 1b