#include <stdarg.h>
#include <stdio.h>
#include <limits.h>
+#include <sys/signal.h>
#include "util.h"
#define SYS_write 64
-#define SYS_exit 93
-#define SYS_stats 1234
-// initialized in crt.S
-int have_vec;
+#undef strcmp
-volatile uint64_t tohost __attribute__((aligned(64)));
-volatile uint64_t fromhost __attribute__((aligned(64)));
+extern volatile uint64_t tohost;
+extern volatile uint64_t fromhost;
-static long handle_frontend_syscall(long which, long arg0, long arg1, long arg2)
+static uintptr_t syscall(uintptr_t which, uint64_t arg0, uint64_t arg1, uint64_t arg2)
{
volatile uint64_t magic_mem[8] __attribute__((aligned(64)));
magic_mem[0] = which;
return magic_mem[0];
}
-// In setStats, we might trap reading uarch-specific counters.
-// The trap handler will skip over the instruction and write 0,
-// but only if a0 is the destination register.
-#define read_csr_safe(reg) ({ register long __tmp asm("a0"); \
- asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \
- __tmp; })
-
-#define NUM_COUNTERS 18
-static long counters[NUM_COUNTERS];
+#define NUM_COUNTERS 2
+static uintptr_t counters[NUM_COUNTERS];
static char* counter_names[NUM_COUNTERS];
-static int handle_stats(int enable)
+
+void setStats(int enable)
{
int i = 0;
#define READ_CTR(name) do { \
while (i >= NUM_COUNTERS) ; \
- long csr = read_csr_safe(name); \
+ uintptr_t csr = read_csr(name); \
if (!enable) { csr -= counters[i]; counter_names[i] = #name; } \
counters[i++] = csr; \
} while (0)
- READ_CTR(mcycle); READ_CTR(minstret);
- READ_CTR(0xcc0); READ_CTR(0xcc1); READ_CTR(0xcc2); READ_CTR(0xcc3);
- READ_CTR(0xcc4); READ_CTR(0xcc5); READ_CTR(0xcc6); READ_CTR(0xcc7);
- READ_CTR(0xcc8); READ_CTR(0xcc9); READ_CTR(0xcca); READ_CTR(0xccb);
- READ_CTR(0xccc); READ_CTR(0xccd); READ_CTR(0xcce); READ_CTR(0xccf);
+
+ READ_CTR(mcycle);
+ READ_CTR(minstret);
+
#undef READ_CTR
- return 0;
}
-void tohost_exit(long code)
+void __attribute__((noreturn)) tohost_exit(uintptr_t code)
{
tohost = (code << 1) | 1;
while (1);
}
-long handle_trap(long cause, long epc, long regs[32])
+uintptr_t __attribute__((weak)) handle_trap(uintptr_t cause, uintptr_t epc, uintptr_t regs[32])
{
- int* csr_insn;
- asm ("jal %0, 1f; csrr a0, 0xcc0; 1:" : "=r"(csr_insn));
- long sys_ret = 0;
-
- if (cause == CAUSE_ILLEGAL_INSTRUCTION &&
- (*(int*)epc & *csr_insn) == *csr_insn)
- ;
- else if (cause != CAUSE_MACHINE_ECALL)
- tohost_exit(1337);
- else if (regs[17] == SYS_exit)
- tohost_exit(regs[10]);
- else if (regs[17] == SYS_stats)
- sys_ret = handle_stats(regs[10]);
- else
- sys_ret = handle_frontend_syscall(regs[17], regs[10], regs[11], regs[12]);
-
- regs[10] = sys_ret;
- return epc+4;
-}
-
-static long syscall(long num, long arg0, long arg1, long arg2)
-{
- register long a7 asm("a7") = num;
- register long a0 asm("a0") = arg0;
- register long a1 asm("a1") = arg1;
- register long a2 asm("a2") = arg2;
- asm volatile ("scall" : "+r"(a0) : "r"(a1), "r"(a2), "r"(a7));
- return a0;
+ tohost_exit(1337);
}
void exit(int code)
{
- syscall(SYS_exit, code, 0, 0);
- while (1);
+ tohost_exit(code);
}
-void setStats(int enable)
+void abort()
{
- syscall(SYS_stats, enable, 0, 0);
+ exit(128 + SIGABRT);
}
void printstr(const char* s)
{
- syscall(SYS_write, 1, (long)s, strlen(s));
+ syscall(SYS_write, 1, (uintptr_t)s, strlen(s));
}
void __attribute__((weak)) thread_entry(int cid, int nc)
if (ch == '\n' || buflen == sizeof(buf))
{
- syscall(SYS_write, 1, (long)buf, buflen);
+ syscall(SYS_write, 1, (uintptr_t)buf, buflen);
buflen = 0;
}