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Rework benchmarks to run in M-mode
[riscv-tests.git]
/
benchmarks
/
dhrystone
/
dhrystone.h
diff --git
a/benchmarks/dhrystone/dhrystone.h
b/benchmarks/dhrystone/dhrystone.h
index 767a65728b796ab462b593071ed2f39060a27bcb..89616afd3b45fec691f538ee101e9038db426b6e 100644
(file)
--- a/
benchmarks/dhrystone/dhrystone.h
+++ b/
benchmarks/dhrystone/dhrystone.h
@@
-381,11
+381,11
@@
extern clock_t clock();
#elif defined(__riscv)
#elif defined(__riscv)
-#define HZ
976563
+#define HZ
1000000
#define Too_Small_Time 1
#define CLOCK_TYPE "rdcycle()"
#define Too_Small_Time 1
#define CLOCK_TYPE "rdcycle()"
-#define Start_Timer() Begin_Time = r
dcycle(
)
-#define Stop_Timer() End_Time = r
dcycle(
)
+#define Start_Timer() Begin_Time = r
ead_csr(mcycle
)
+#define Stop_Timer() End_Time = r
ead_csr(mcycle
)
#else
/* Use times(2) time function unless */
#else
/* Use times(2) time function unless */