Reflect changes to ISA

[riscv-tests.git] / benchmarks / vec-cmplxmult / vec_cmplxmult_asm.S

diff --git a/benchmarks/vec-cmplxmult/vec_cmplxmult_asm.S b/benchmarks/vec-cmplxmult/vec_cmplxmult_asm.S
index 07719656432721ed1ee186cf8ae71e3bbe9cd159..9ccd6c2d103ca1e16e5c6511ca356ab81dc58dda 100644 (file)
--- a/benchmarks/vec-cmplxmult/vec_cmplxmult_asm.S
+++ b/benchmarks/vec-cmplxmult/vec_cmplxmult_asm.S
@@ -21,9 +21,9 @@
 #define rVlen   a6
 #define rStride a7
 
-#define rAI a8
-#define rBI a9
-#define rCI a10
+#define rAI t0
+#define rBI t1
+#define rCI t2
 
 # WARNING: do not write to the s0,...,s9 registers without first saving them to
 # the stack.