rwatch/watch on explicit address

[riscv-tests.git] / debug / gdbserver.py

diff --git a/debug/gdbserver.py b/debug/gdbserver.py
index 257f8d409db6a10e12347f451fe9d612c20751bc..bd9babc717b5fabfdd2bc75870146de0f1bca37c 100755 (executable)
--- a/debug/gdbserver.py
+++ b/debug/gdbserver.py
@@ -692,7 +692,8 @@ class TriggerLoadAddressInstant(TriggerTest):
         self.gdb.c()
         read_loop = self.gdb.p("&read_loop")
         read_again = self.gdb.p("&read_again")
-        self.gdb.command("rwatch data")
+        data = self.gdb.p("&data")
+        self.gdb.command("rwatch *0x%x" % data)
         self.gdb.c()
         # Accept hitting the breakpoint before or after the load instruction.
         assertIn(self.gdb.p("$pc"), [read_loop, read_loop + 4])
@@ -719,7 +720,8 @@ class TriggerStoreAddressInstant(TriggerTest):
         self.gdb.command("b just_before_write_loop")
         self.gdb.c()
         write_loop = self.gdb.p("&write_loop")
-        self.gdb.command("watch data")
+        data = self.gdb.p("&data")
+        self.gdb.command("watch *0x%x" % data)
         self.gdb.c()
         # Accept hitting the breakpoint before or after the store instruction.
         assertIn(self.gdb.p("$pc"), [write_loop, write_loop + 4])