Remove hardware breakpoints so future tests work.
[riscv-tests.git] / debug / gdbserver.py
index e9e75c3dc9778e6b4ddf88cd5ded466829ce6a2a..030b6a17aba70386b8a77fc220a5bcf4e843ef19 100755 (executable)
@@ -177,15 +177,33 @@ class DebugTest(DeleteServer):
         """Single step a bunch of times."""
         self.gdb.command("p i=0");
         last_pc = None
+        advances = 0
+        jumps = 0
         for _ in range(100):
             self.gdb.stepi()
-            pc = self.gdb.command("p $pc")
+            pc = self.gdb.p("$pc")
             self.assertNotEqual(last_pc, pc)
+            if (last_pc and pc > last_pc and pc - last_pc <= 4):
+                advances += 1
+            else:
+                jumps += 1
             last_pc = pc
+        # Some basic sanity that we're not running between breakpoints or
+        # something.
+        self.assertGreater(jumps, 10)
+        self.assertGreater(advances, 50)
 
     def test_exit(self):
         self.exit()
 
+    def test_symbols(self):
+        self.gdb.b("main")
+        self.gdb.b("rot13")
+        output = self.gdb.c()
+        self.assertIn(", main ", output)
+        output = self.gdb.c()
+        self.assertIn(", rot13 ", output)
+
     def test_breakpoint(self):
         self.gdb.b("rot13")
         # The breakpoint should be hit exactly 2 times.
@@ -196,7 +214,7 @@ class DebugTest(DeleteServer):
             #TODO self.assertIn("rot13 ", output)
         self.exit()
 
-    def test_hwbp(self):
+    def test_hwbp_1(self):
         self.gdb.hbreak("rot13")
         # The breakpoint should be hit exactly 2 times.
         for i in range(2):
@@ -206,6 +224,27 @@ class DebugTest(DeleteServer):
             #TODO self.assertIn("rot13 ", output)
         self.exit()
 
+    def test_hwbp_2(self):
+        self.gdb.hbreak("main")
+        self.gdb.hbreak("rot13")
+        # We should hit 3 breakpoints.
+        for i in range(3):
+            output = self.gdb.c()
+            self.gdb.p("$pc")
+            self.assertIn("Breakpoint ", output)
+            #TODO self.assertIn("rot13 ", output)
+        self.exit()
+
+    def test_too_many_hwbp(self):
+        for i in range(30):
+            self.gdb.hbreak("*rot13 + %d" % (i * 4))
+
+        output = self.gdb.c()
+        self.assertIn("Cannot insert hardware breakpoint", output)
+        # Clean up, otherwise the hardware breakpoints stay set and future
+        # tests may fail.
+        self.gdb.command("D")
+
     def test_registers(self):
         # Get to a point in the code where some registers have actually been
         # used.
@@ -250,6 +289,24 @@ class DebugTest(DeleteServer):
         self.gdb.p("i=0");
         self.exit()
 
+class StepTest(DeleteServer):
+    def setUp(self):
+        self.binary = target.compile("programs/step.S")
+        self.server = target.server()
+        self.gdb = testlib.Gdb()
+        self.gdb.command("file %s" % self.binary)
+        self.gdb.command("target extended-remote localhost:%d" % self.server.port)
+        self.gdb.load()
+        self.gdb.b("main")
+        self.gdb.c()
+
+    def test_step(self):
+        main = self.gdb.p("$pc")
+        for expected in (4, 0xc, 0x10, 0x18, 0x14, 0x14):
+            self.gdb.stepi()
+            pc = self.gdb.p("$pc")
+            self.assertEqual(pc - main, expected)
+
 class RegsTest(DeleteServer):
     def setUp(self):
         self.binary = target.compile("programs/regs.S")
@@ -300,7 +357,7 @@ class RegsTest(DeleteServer):
 
 class DownloadTest(DeleteServer):
     def setUp(self):
-        length = 2**20
+        length = min(2**20, target.ram_size - 2048)
         fd = file("download.c", "w")
         fd.write("#include <stdint.h>\n")
         fd.write("unsigned int crc32a(uint8_t *message, unsigned int size);\n")
@@ -346,6 +403,7 @@ class MprvTest(DeleteServer):
     def test_mprv(self):
         """Test that the debugger can access memory when MPRV is set."""
         self.gdb.c(wait=False)
+        time.sleep(0.5)
         self.gdb.interrupt()
         output = self.gdb.command("p/x *(int*)(((char*)&data)-0x80000000)")
         self.assertIn("0xbead", output)
@@ -368,6 +426,7 @@ class Spike64Target(Target):
     name = "spike"
     xlen = 64
     ram = 0x80010000
+    ram_size = 5 * 1024 * 1024
 
     def server(self):
         return testlib.Spike(parsed.cmd, halted=True)
@@ -377,6 +436,7 @@ class Spike32Target(Target):
     directory = "spike"
     xlen = 32
     ram = 0x80010000
+    ram_size = 5 * 1024 * 1024
 
     def server(self):
         return testlib.Spike(parsed.cmd, halted=True, xlen=32)
@@ -385,6 +445,7 @@ class MicroSemiTarget(Target):
     name = "m2gl_m2s"
     xlen = 32
     ram = 0x80000000
+    ram_size = 16 * 1024
 
     def server(self):
         return testlib.Openocd(cmd=parsed.cmd,