Fix/add to instant trigger tests.

[riscv-tests.git] / debug / gdbserver.py

diff --git a/debug/gdbserver.py b/debug/gdbserver.py
index 71575b2c61776d1aa01f3178284d133635060530..b2a7c167f4b52e1534e1997d10a5ed1442de75d1 100755 (executable)
--- a/debug/gdbserver.py
+++ b/debug/gdbserver.py
@@ -3,13 +3,14 @@
 import os
 import sys
 import argparse
-import testlib
 import unittest
 import tempfile
 import time
 import random
 import binascii
 
+import testlib
+
 
 MSTATUS_UIE = 0x00000001
 MSTATUS_SIE = 0x00000002
@@ -51,6 +52,8 @@ def gdb(
     if port:
         gdb.command("target extended-remote localhost:%d" % port)
 
+    gdb.p("$priv=3")
+
     return gdb
 
         
@@ -375,6 +378,77 @@ class StepTest(DeleteServer):
             pc = self.gdb.p("$pc")
             self.assertEqual("%x" % pc, "%x" % (expected + main))
 
+class TriggerTest(DeleteServer):
+    def setUp(self):
+        self.binary = target.compile("programs/trigger.S")
+        self.server = target.server()
+        self.gdb = gdb(target, self.server.port, self.binary)
+        self.gdb.load()
+        self.gdb.b("_exit")
+        self.gdb.b("main")
+        self.gdb.c()
+
+    def exit(self):
+        output = self.gdb.c()
+        self.assertIn("Breakpoint", output)
+        self.assertIn("_exit", output)
+
+    def test_execute_instant(self):
+        """Test an execute breakpoint on the first instruction executed out of
+        debug mode."""
+        main = self.gdb.p("$pc")
+        self.gdb.command("hbreak *0x%x" % (main + 4))
+        self.gdb.c()
+        self.assertEqual(self.gdb.p("$pc"), main+4)
+
+    def test_load_address(self):
+        self.gdb.command("rwatch *((&data)+1)");
+        output = self.gdb.c()
+        self.assertIn("read_loop", output)
+        self.assertEqual(self.gdb.p("$a0"),
+                self.gdb.p("(&data)+1"))
+        self.exit()
+
+    def test_load_address_instant(self):
+        """Test a load address breakpoint on the first instruction executed out
+        of debug mode."""
+        self.gdb.command("b just_before_read_loop")
+        self.gdb.c()
+        read_loop = self.gdb.p("&read_loop")
+        self.gdb.command("rwatch data");
+        self.gdb.c()
+        # Accept hitting the breakpoint before or after the load instruction.
+        self.assertIn(self.gdb.p("$pc"), [read_loop, read_loop + 4])
+        self.assertEqual(self.gdb.p("$a0"), self.gdb.p("&data"))
+
+    def test_store_address(self):
+        self.gdb.command("watch *((&data)+3)");
+        output = self.gdb.c()
+        self.assertIn("write_loop", output)
+        self.assertEqual(self.gdb.p("$a0"),
+                self.gdb.p("(&data)+3"))
+        self.exit()
+
+    def test_store_address_instant(self):
+        """Test a store address breakpoint on the first instruction executed out
+        of debug mode."""
+        self.gdb.command("b just_before_write_loop")
+        self.gdb.c()
+        write_loop = self.gdb.p("&write_loop")
+        self.gdb.command("watch data");
+        self.gdb.c()
+        # Accept hitting the breakpoint before or after the store instruction.
+        self.assertIn(self.gdb.p("$pc"), [write_loop, write_loop + 4])
+        self.assertEqual(self.gdb.p("$a0"), self.gdb.p("&data"))
+
+    def test_dmode(self):
+        self.gdb.command("hbreak handle_trap")
+        self.gdb.p("$pc=write_valid")
+        output = self.gdb.c()
+        self.assertIn("handle_trap", output)
+        self.assertIn("mcause=2", output)
+        self.assertIn("mepc=%d" % self.gdb.p("&write_invalid_illegal"), output)
+
 class RegsTest(DeleteServer):
     def setUp(self):
         self.binary = target.compile("programs/regs.S")
@@ -550,7 +624,7 @@ class SpikeTarget(Target):
     directory = "spike"
     ram = 0x80010000
     ram_size = 5 * 1024 * 1024
-    instruction_hardware_breakpoint_count = 0
+    instruction_hardware_breakpoint_count = 4
     reset_vector = 0x1000
 
 class Spike64Target(SpikeTarget):