debug: working with newprogram branch
[riscv-tests.git] / debug / targets / freedom-e300-sim / openocd.cfg
index 0b808858a410a53f876d02fec4a5fc42c52e42e2..f3d9cb43a596f8fd90263d0cfaebff33da5c2903 100644 (file)
@@ -7,8 +7,7 @@ set _CHIPNAME riscv
 jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME riscv -chain-position $_TARGETNAME
+target create $_TARGETNAME riscv -chain-position $_TARGETNAME -rtos riscv
 
 init
-
 halt