Update IDCODE.

[riscv-tests.git] / debug / targets / m2gl_m2s / openocd.cfg

diff --git a/debug/targets/m2gl_m2s/openocd.cfg b/debug/targets/m2gl_m2s/openocd.cfg
index da20ccc09bf6f4f3edf3eb81a04b87cf288bd4af..ea34f873460d24e20371b38c23704cf24db0db39 100644 (file)
--- a/debug/targets/m2gl_m2s/openocd.cfg
+++ b/debug/targets/m2gl_m2s/openocd.cfg
@@ -3,7 +3,7 @@ adapter_khz     100
 source [find interface/ftdi/olimex-arm-usb-tiny-h.cfg]
 
 set _CHIPNAME riscv
-jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1525600b
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
 
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME riscv -chain-position $_TARGETNAME