Pull port number from VCS output and pass to OpenOCD.

[riscv-tests.git] / debug / testlib.py

diff --git a/debug/testlib.py b/debug/testlib.py
index 987d71e511e0c11549c820fc81537d4b39123e47..308bf2157619ceb09f33363a1acbf2ecbe9feb7d 100644 (file)
--- a/debug/testlib.py
+++ b/debug/testlib.py
@@ -1,4 +1,5 @@
 import os.path
+import re
 import shlex
 import subprocess
 import time
@@ -101,8 +102,11 @@ class VcsSim(object):
             line = listenfile.readline()
             if not line:
                 time.sleep(1)
-            if "Listening on port 5555" in line:
+            match = re.match(r"^Listening on port (\d+)$", line)
+            if match:
                 done = True
+                self.port = int(match.group(1))
+                print "Using port %d for JTAG VPI" % self.port
 
     def __del__(self):
         try:
@@ -128,13 +132,37 @@ class Openocd(object):
             cmd += ["-f", find_file(config)]
         if debug:
             cmd.append("-d")
+
+        # Assign port
+        self.port = unused_port()
+        print "Using port %d for gdb server" % self.port
+        # This command needs to come before any config scripts on the command
+        # line, since they are executed in order.
+        cmd[1:1] = ["--command", "gdb_port %d" % self.port]
+
+        env = os.environ.copy()
+        env['JTAG_VPI_PORT'] = str(otherProcess.port)
+
         logfile = open(Openocd.logname, "w")
         logfile.write("+ %s\n" % " ".join(cmd))
         logfile.flush()
         self.process = subprocess.Popen(cmd, stdin=subprocess.PIPE,
-                stdout=logfile, stderr=logfile)
-        # TODO: Pick a random port
-        self.port = 3333
+                stdout=logfile, stderr=logfile, env=env)
+
+        # Wait for OpenOCD to have made it through riscv_examine(). When using
+        # OpenOCD to communicate with a simulator this may take a long time,
+        # and gdb will time out when trying to connect if we attempt too early.
+        start = time.time()
+        messaged = False
+        while True:
+            log = open(Openocd.logname).read()
+            if "Examined RISCV core" in log:
+                break
+            if not self.process.poll() is None:
+                raise Exception("OpenOCD exited before completing riscv_examine()")
+            if not messaged and time.time() - start > 1:
+                messaged = True
+                print "Waiting for OpenOCD to examine RISCV core..."
 
     def __del__(self):
         try:
@@ -143,6 +171,11 @@ class Openocd(object):
         except OSError:
             pass
 
+class CannotAccess(Exception):
+    def __init__(self, address):
+        Exception.__init__(self)
+        self.address = address
+
 class Gdb(object):
     def __init__(self,
             cmd=os.path.expandvars("$RISCV/bin/riscv64-unknown-elf-gdb")):
@@ -187,6 +220,9 @@ class Gdb(object):
 
     def p(self, obj):
         output = self.command("p/x %s" % obj)
+        m = re.search("Cannot access memory at address (0x[0-9a-f]+)", output)
+        if m:
+            raise CannotAccess(int(m.group(1), 0))
         value = int(output.split('=')[-1].strip(), 0)
         return value
 
@@ -197,7 +233,6 @@ class Gdb(object):
 
     def stepi(self):
         output = self.command("stepi")
-        assert "Cannot" not in output
         return output
 
     def load(self):