Mask off large constants for RV32

[riscv-tests.git] / isa / macros / vector / test_macros.h

diff --git a/isa/macros/vector/test_macros.h b/isa/macros/vector/test_macros.h
index 5a8f0a157bf5225d4cc542ed05362453ccee8d41..7ee926293b7384a1b10765c52db7011e05fb2308 100644 (file)
--- a/isa/macros/vector/test_macros.h
+++ b/isa/macros/vector/test_macros.h
@@ -1,3 +1,5 @@
+// See LICENSE for license details.
+
 #ifndef __TEST_MACROS_VECTOR_H
 #define __TEST_MACROS_VECTOR_H
 
@@ -18,8 +20,8 @@ test_ ## testnum: \
   vsetcfg nxreg,nfreg; \
   li a3,2048; \
   vsetvl a3,a3; \
-  lui a0,%hi(vtcode ## testnum ); \
-  vf %lo(vtcode ## testnum )(a0); \
+1:auipc a0,%pcrel_hi(vtcode ## testnum); \
+  vf %pcrel_lo(1b)(a0); \
   la a4,dst; \
   vsd v ## testreg, a4; \
   fence; \
@@ -231,8 +233,8 @@ test_ ## testnum: \
   addi a5,a5,4; \
   vflstw vf2, a5, x0; \
   addi a5,a5,4; \
-  lui a0,%hi(vtcode ## testnum ); \
-  vf %lo(vtcode ## testnum )(a0); \
+1:auipc a0,%pcrel_hi(vtcode ## testnum); \
+  vf %pcrel_lo(1b)(a0); \
   la a4,dst; \
   vsw vx1, a4; \
   fence; \
@@ -247,7 +249,7 @@ skip ## testnum : \
   addi a4,a4,4; \
   addi a2,a2,1; \
   bne a2,a3,test_loop ## testnum; \
-  b 1f; \
+  j 1f; \
 vtcode ## testnum : \
   code; \
   stop; \
@@ -271,8 +273,8 @@ test_ ## testnum: \
   addi a5,a5,8; \
   vflstd vf2, a5, x0; \
   addi a5,a5,8; \
-  lui a0,%hi(vtcode ## testnum ); \
-  vf %lo(vtcode ## testnum )(a0); \
+1:auipc a0,%pcrel_hi(vtcode ## testnum); \
+  vf %pcrel_lo(1b)(a0); \
   la a4,dst; \
   vsd vx1, a4; \
   fence; \
@@ -287,7 +289,7 @@ skip ## testnum : \
   addi a4,a4,8; \
   addi a2,a2,1; \
   bne a2,a3,test_loop ## testnum; \
-  b 1f; \
+  j 1f; \
 vtcode ## testnum : \
   code; \
   stop; \
@@ -307,27 +309,27 @@ vtcode ## testnum : \
   TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, float result, val1, 0.0, 0.0, \
                     fcvt.d.s f3, f0; fcvt.s.d f3, f3; fmv.x.s x1, f3)
 
-#define TEST_FP_OP2_S( testnum, inst, result, val1, val2 ) \
+#define TEST_FP_OP2_S( testnum, inst, flags, result, val1, val2 ) \
   TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, float result, val1, val2, 0.0, \
                     inst f3, f0, f1; fmv.x.s x1, f3)
 
-#define TEST_FP_OP2_D( testnum, inst, result, val1, val2 ) \
+#define TEST_FP_OP2_D( testnum, inst, flags, result, val1, val2 ) \
   TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, double result, val1, val2, 0.0, \
                     inst f3, f0, f1; fmv.x.d x1, f3)
 
-#define TEST_FP_OP3_S( testnum, inst, result, val1, val2, val3 ) \
+#define TEST_FP_OP3_S( testnum, inst, flags, result, val1, val2, val3 ) \
   TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, float result, val1, val2, val3, \
                     inst f3, f0, f1, f2; fmv.x.s x1, f3)
 
-#define TEST_FP_OP3_D( testnum, inst, result, val1, val2, val3 ) \
+#define TEST_FP_OP3_D( testnum, inst, flags, result, val1, val2, val3 ) \
   TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, double result, val1, val2, val3, \
                     inst f3, f0, f1, f2; fmv.x.d x1, f3)
 
-#define TEST_FP_INT_OP_S( testnum, inst, result, val1, rm ) \
+#define TEST_FP_INT_OP_S( testnum, inst, flags, result, val1, rm ) \
   TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, word result, val1, 0.0, 0.0, \
                     inst x1, f0, rm)
 
-#define TEST_FP_INT_OP_D( testnum, inst, result, val1, rm ) \
+#define TEST_FP_INT_OP_D( testnum, inst, flags, result, val1, rm ) \
   TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, dword result, val1, 0.0, 0.0, \
                     inst x1, f0, rm)
 
@@ -344,8 +346,8 @@ test_ ## testnum: \
   vsetcfg 2,1; \
   li a3,2048; \
   vsetvl a3,a3; \
-  lui a0,%hi(vtcode ## testnum ); \
-  vf %lo(vtcode ## testnum )(a0); \
+1:auipc a0,%pcrel_hi(vtcode ## testnum); \
+  vf %pcrel_lo(1b)(a0); \
   la a4,dst; \
   vsw vx1, a4; \
   fence; \
@@ -361,7 +363,7 @@ skip ## testnum : \
   addi a4,a4,4; \
   addi a2,a2,1; \
   bne a2,a3,test_loop ## testnum; \
-  b 1f; \
+  j 1f; \
 vtcode ## testnum : \
   li x1, val1; \
   inst f0, x1; \
@@ -377,8 +379,8 @@ test_ ## testnum: \
   vsetcfg 2,1; \
   li a3,2048; \
   vsetvl a3,a3; \
-  lui a0,%hi(vtcode ## testnum ); \
-  vf %lo(vtcode ## testnum )(a0); \
+1:auipc a0,%pcrel_hi(vtcode ## testnum); \
+  vf %pcrel_lo(1b)(a0); \
   la a4,dst; \
   vsd vx1, a4; \
   fence; \
@@ -394,7 +396,7 @@ skip ## testnum : \
   addi a4,a4,8; \
   addi a2,a2,1; \
   bne a2,a3,test_loop ## testnum; \
-  b 1f; \
+  j 1f; \
 vtcode ## testnum : \
   li x1, val1; \
   inst f0, x1; \
@@ -527,8 +529,8 @@ test_ ## testnum: \
   vsetcfg nxreg,nfreg; \
   li a3,2048; \
   vsetvl a3,a3; \
-  lui a0,%hi(vtcode ## testnum ); \
-  vf %lo(vtcode ## testnum )(a0); \
+1:auipc a0,%pcrel_hi(vtcode ## testnum); \
+  vf %pcrel_lo(1b)(a0); \
   la a4,dst; \
   fence; \
   li a1,correctval; \
@@ -597,7 +599,7 @@ next ## testnum :
 #define TEST_PASSFAIL \
         bne x0, TESTNUM, pass; \
 fail: \
-        RVTEST_FAIL \
+        RVTEST_FAIL; \
 pass: \
         RVTEST_PASS \