New M-mode timers

[riscv-tests.git] / isa / rv32mi / timer.S

diff --git a/isa/rv32mi/timer.S b/isa/rv32mi/timer.S
index 58dac99c567afdd3f71050f41249478634912739..307876c96133cf89f17d2b231143e732efb6742b 100644 (file)
--- a/isa/rv32mi/timer.S
+++ b/isa/rv32mi/timer.S
@@ -1,8 +1,7 @@
 # See LICENSE for license details.
 
 #include "riscv_test.h"
-#undef RVTEST_RV64S
-#define RVTEST_RV64S RVTEST_RV32M
-#define __MACHINE_MODE
+#undef RVTEST_RV64M
+#define RVTEST_RV64M RVTEST_RV32M
 
-#include "../rv64si/timer.S"
+#include "../rv64mi/timer.S"