Merge rv64si and rv32si tests

[riscv-tests.git] / isa / rv32si / sbreak.S

diff --git a/isa/rv32si/sbreak.S b/isa/rv32si/sbreak.S
index cd920db0240096015d735147ff966c9c7eefc5e0..3dcfba2d8ea6566d0b0654dc57156b6b98ed7228 100644 (file)
--- a/isa/rv32si/sbreak.S
+++ b/isa/rv32si/sbreak.S
@@ -1,43 +1,7 @@
 # See LICENSE for license details.
 
-#*****************************************************************************
-# scall.S
-#-----------------------------------------------------------------------------
-#
-# Test syscall trap.
-#
-
 #include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV32S
-RVTEST_CODE_BEGIN
-
-  la t0, stvec
-  csrw stvec, t0
-
-  li TESTNUM, 2
-  sbreak
-  j fail
-
-  j pass
-
-  TEST_PASSFAIL
-
-stvec:
-  li t1, CAUSE_BREAKPOINT
-  csrr t0, scause
-  bne t0, t1, fail
-  csrr t0, sepc
-  addi t0, t0, 8
-  csrw sepc, t0
-  sret
-
-RVTEST_CODE_END
-
-  .data
-RVTEST_DATA_BEGIN
-
-  TEST_DATA
+#undef RVTEST_RV64S
+#define RVTEST_RV64S RVTEST_RV32S
 
-RVTEST_DATA_END
+#include "../rv64si/sbreak.S"