Update to new privileged spec

[riscv-tests.git] / isa / rv32si / shamt.S

diff --git a/isa/rv32si/shamt.S b/isa/rv32si/shamt.S
index ee1c8b5ce44f3f4bf04f5d31604b8a4ce85ce657..4fe7c2f82be5670eef28353cde85406771eddbe7 100644 (file)
--- a/isa/rv32si/shamt.S
+++ b/isa/rv32si/shamt.S
@@ -13,25 +13,25 @@
 RVTEST_RV32S
 RVTEST_CODE_BEGIN
 
-  la t0, evec
-  csrw evec, t0
+  la t0, stvec
+  csrw stvec, t0
 
   # Make sure slli with shamt[4] set is legal.
   TEST_CASE( 2, a0, 65536, li a0, 1; slli a0, a0, 16);
 
-  # Make sure slli with shamt[4] set is not legal.
+  # Make sure slli with shamt[5] set is not legal.
   TEST_CASE( 3, x0, 1, slli a0, a0, 32);
 
   TEST_PASSFAIL
 
-evec:
+stvec:
   # Trapping on test 3 is good.
   # Note that since the test didn't complete, TESTNUM is smaller by 1.
   li t0, 2
   bne TESTNUM, t0, fail
 
   # Make sure CAUSE indicates an illegal instructino.
-  csrr t0, cause
+  csrr t0, scause
   li t1, CAUSE_ILLEGAL_INSTRUCTION
   bne t0, t1, fail
   j pass