Better coverage of mul high instructions

[riscv-tests.git] / isa / rv32ui / mulhsu.S

diff --git a/isa/rv32ui/mulhsu.S b/isa/rv32ui/mulhsu.S
index 1d3dd3e463da0b4f5a8e0b05b719fba0d906aa32..93e698c6505f490df96094900de6b83aab4c2c7f 100644 (file)
--- a/isa/rv32ui/mulhsu.S
+++ b/isa/rv32ui/mulhsu.S
@@ -25,6 +25,15 @@ RVTEST_CODE_BEGIN
   TEST_RR_OP( 6,  mulhsu, 0x00000000, 0x80000000, 0x00000000 );
   TEST_RR_OP( 7,  mulhsu, 0x80004000, 0x80000000, 0xffff8000 );
 
+  TEST_RR_OP(30,  mulhsu, 0xfffe0101, 0xaaaaaaab, 0x0002fe7d );
+  TEST_RR_OP(31,  mulhsu, 0x0001fefe, 0x0002fe7d, 0xaaaaaaab );
+
+  TEST_RR_OP(32,  mulhsu, 0x01ff0000, 0xff000000, 0xff000000 );
+
+  TEST_RR_OP(33,  mulhsu, 0x00000001, 0xffffffff, 0xffffffff );
+  TEST_RR_OP(34,  mulhsu, 0xffffffff, 0xffffffff, 0x00000001 );
+  TEST_RR_OP(35,  mulhsu, 0x00000000, 0x00000001, 0xffffffff );
+
   #-------------------------------------------------------------
   # Source/Destination tests
   #-------------------------------------------------------------