breakpoint.S: Don't assume trigger is hardwired to breakpoint (#158) (#159)

[riscv-tests.git] / isa / rv64mi / breakpoint.S

diff --git a/isa/rv64mi/breakpoint.S b/isa/rv64mi/breakpoint.S
index 647430b8daa5865b836cd8caf255b8f63b58a004..df415a16f6467e283ef37ccbd575755ac557aa3b 100644 (file)
--- a/isa/rv64mi/breakpoint.S
+++ b/isa/rv64mi/breakpoint.S
@@ -29,7 +29,7 @@ RVTEST_CODE_BEGIN
 
   la a2, 1f
   csrw tdata2, a2
-  li a0, MCONTROL_M | MCONTROL_EXECUTE
+  li a0, (2 << (__riscv_xlen - 4)) | MCONTROL_M | MCONTROL_EXECUTE
   csrw tdata1, a0
   # Skip if breakpoint type is unsupported.
   csrr a1, tdata1