ERET -> xRET; new memory map

[riscv-tests.git] / isa / rv64si / csr.S

diff --git a/isa/rv64si/csr.S b/isa/rv64si/csr.S
index edaaeb3e1da32cca2f899457c8d7343a945d0e61..35fc99a52feed5f0cc7a5613983ab4075afbb65d 100644 (file)
--- a/isa/rv64si/csr.S
+++ b/isa/rv64si/csr.S
@@ -13,10 +13,16 @@
 RVTEST_RV64S
 RVTEST_CODE_BEGIN
 
-  # Set up stvec in case we trap.
-  la t0, stvec
-  csrw stvec, t0
-  csrwi scycle, 0
+#ifdef __MACHINE_MODE
+  #define sscratch mscratch
+  #define sstatus mstatus
+  #define scause mcause
+  #define sepc mepc
+  #define sret mret
+  #define stvec_handler mtvec_handler
+  #undef SSTATUS_SPP
+  #define SSTATUS_SPP MSTATUS_MPP
+#endif
 
   csrwi sscratch, 3
   TEST_CASE( 2, a0,         3, csrr a0, sscratch);
@@ -29,10 +35,13 @@ RVTEST_CODE_BEGIN
   TEST_CASE( 9, a0, 0xbadbeef, csrr a0, sscratch);
 
   # Make sure writing the cycle counter causes an exception.
+  # Don't run in supervisor, as we don't delegate illegal instruction traps.
+#ifdef __MACHINE_MODE
   TEST_CASE(10, a0, 255, li a0, 255; csrrw a0, cycle, x0);
+#endif
 
-  # Enter user mode
-  li t0, SSTATUS_PS
+  # jump to user land
+  li t0, SSTATUS_SPP
   csrc sstatus, t0
   la t0, 1f
   csrw sepc, t0
@@ -40,32 +49,34 @@ RVTEST_CODE_BEGIN
   1:
 
   # Make sure reading status in user mode causes an exception.
-  TEST_CASE(11, a0, 255, li a0, 255; csrr a0, sstatus);
+  # Don't run in supervisor, as we don't delegate illegal instruction traps.
+#ifdef __MACHINE_MODE
+  TEST_CASE(11, a0, 255, li a0, 255; csrr a0, sstatus)
+#else
+  TEST_CASE(11, x0, 0, nop)
+#endif
 
-  # Make sure rdcycle is legal in user mode.
-  TEST_CASE(12, x0, 0, rdcycle a0)
-
-  # Exit by doing a syscall.
-  TEST_CASE(13, x0, 1, scall)
+  RVTEST_PASS
 
   # We should only fall through to this if scall failed.
   TEST_PASSFAIL
 
-stvec:
-  # Trapping on tests 10, 11, and 13 is usually good news.
+stvec_handler:
+  # Trapping on tests 10 and 11 is good news.
   # Note that since the test didn't complete, TESTNUM is smaller by 1.
   li t0, 9
   beq TESTNUM, t0, privileged
   li t0, 10
   beq TESTNUM, t0, privileged
-  li t0, 12
-  beq TESTNUM, t0, syscall
 
-  # Trapping on other tests is bad news.
-  j fail
+  # catch RVTEST_PASS and kick it up to M-mode
+  csrr t0, scause
+  li t1, CAUSE_USER_ECALL
+  bne t0, t1, fail
+  RVTEST_PASS
 
 privileged:
-  # Make sure CAUSE indicates a lack of privilege.
+  # Make sure scause indicates a lack of privilege.
   csrr t0, scause
   li t1, CAUSE_ILLEGAL_INSTRUCTION
   bne t0, t1, fail
@@ -75,15 +86,6 @@ privileged:
   csrw sepc, t0
   sret
 
-syscall:
-  # Make sure CAUSE indicates a syscall.
-  csrr t0, scause
-  li t1, CAUSE_ECALL
-  bne t0, t1, fail
-
-  # We're done.
-  j pass
-
 RVTEST_CODE_END
 
   .data