skip user-mode trap tests in rv32mi/rv64mi-p-csr if no user mode

[riscv-tests.git] / isa / rv64si / csr.S

diff --git a/isa/rv64si/csr.S b/isa/rv64si/csr.S
index 5d4b309510f36fe9c2740fcb07bc797f1da4b1ef..68f6fb109abce94c67cfff1c33e3d979b6be0bb5 100644 (file)
--- a/isa/rv64si/csr.S
+++ b/isa/rv64si/csr.S
@@ -18,13 +18,12 @@ RVTEST_CODE_BEGIN
   #define sstatus mstatus
   #define scause mcause
   #define sepc mepc
+  #define sret mret
   #define stvec_handler mtvec_handler
-  #undef SSTATUS_PS
-  #define SSTATUS_PS MSTATUS_PRV1
+  #undef SSTATUS_SPP
+  #define SSTATUS_SPP MSTATUS_MPP
 #endif
 
-  csrwi scycle, 0
-
   csrwi sscratch, 3
   TEST_CASE( 2, a0,         3, csrr a0, sscratch);
   TEST_CASE( 3, a1,         3, csrrci a1, sscratch, 1);
@@ -35,11 +34,22 @@ RVTEST_CODE_BEGIN
   TEST_CASE( 8, a0, 0xbad0000, li a0, 0x000beef; csrrs a0, sscratch, a0);
   TEST_CASE( 9, a0, 0xbadbeef, csrr a0, sscratch);
 
+#ifdef __MACHINE_MODE
+  # Figure out if 'U' is set in misa
+  csrr a0, misa   # a0 = csr(misa)
+  srli a0, a0, 20 # a0 = a0 >> 20
+  andi a0, a0, 1  # a0 = a0 & 1
+  beqz a0, finish # if no user mode, skip the rest of these checks
+#endif
+
   # Make sure writing the cycle counter causes an exception.
+  # Don't run in supervisor, as we don't delegate illegal instruction traps.
+#ifdef __MACHINE_MODE
   TEST_CASE(10, a0, 255, li a0, 255; csrrw a0, cycle, x0);
+#endif
 
   # jump to user land
-  li t0, SSTATUS_PS
+  li t0, SSTATUS_SPP
   csrc sstatus, t0
   la t0, 1f
   csrw sepc, t0
@@ -47,29 +57,33 @@ RVTEST_CODE_BEGIN
   1:
 
   # Make sure reading status in user mode causes an exception.
-  TEST_CASE(11, a0, 255, li a0, 255; csrr a0, sstatus);
-
-  # Make sure rdcycle is legal in user mode.
-  TEST_CASE(12, x0, 0, rdcycle a0)
+  # Don't run in supervisor, as we don't delegate illegal instruction traps.
+#ifdef __MACHINE_MODE
+  TEST_CASE(11, a0, 255, li a0, 255; csrr a0, sstatus)
+#else
+  TEST_CASE(11, x0, 0, nop)
+#endif
 
-  # Exit by doing a syscall.
-  TEST_CASE(13, x0, 1, scall)
+finish:
+  RVTEST_PASS
 
   # We should only fall through to this if scall failed.
   TEST_PASSFAIL
 
+  .align 2
 stvec_handler:
-  # Trapping on tests 10, 11, and 13 is usually good news.
+  # Trapping on tests 10 and 11 is good news.
   # Note that since the test didn't complete, TESTNUM is smaller by 1.
   li t0, 9
   beq TESTNUM, t0, privileged
   li t0, 10
   beq TESTNUM, t0, privileged
-  li t0, 12
-  beq TESTNUM, t0, syscall
 
-  # Trapping on other tests is bad news.
-  j fail
+  # catch RVTEST_PASS and kick it up to M-mode
+  csrr t0, scause
+  li t1, CAUSE_USER_ECALL
+  bne t0, t1, fail
+  RVTEST_PASS
 
 privileged:
   # Make sure scause indicates a lack of privilege.
@@ -82,15 +96,6 @@ privileged:
   csrw sepc, t0
   sret
 
-syscall:
-  # Make sure scause indicates a syscall.
-  csrr t0, scause
-  li t1, CAUSE_ECALL
-  bne t0, t1, fail
-
-  # We're done.
-  j pass
-
 RVTEST_CODE_END
 
   .data