Remove cache miss test from all but one AMO test

[riscv-tests.git] / isa / rv64ua / amomin_d.S

diff --git a/isa/rv64ua/amomin_d.S b/isa/rv64ua/amomin_d.S
index e6febbb549838b1f41bb8cb4a0cafcaeffdda5be..ee6bbf39616ebbe88edb262c0a794b1fdd8520c0 100644 (file)
--- a/isa/rv64ua/amomin_d.S
+++ b/isa/rv64ua/amomin_d.S
@@ -46,4 +46,3 @@ RVTEST_DATA_END
   .align 3
 amo_operand:
   .dword 0
-  .skip 65536