Use NaN macros

[riscv-tests.git] / isa / rv64uf / fcmp.S

diff --git a/isa/rv64uf/fcmp.S b/isa/rv64uf/fcmp.S
index e77ca527894ab8abebdd4eb2337803e07ddc6ad7..2d7fcc243e27689c6917ccce21660dae51b81eab 100644 (file)
--- a/isa/rv64uf/fcmp.S
+++ b/isa/rv64uf/fcmp.S
@@ -28,15 +28,15 @@ RVTEST_CODE_BEGIN
   # Only sNaN should signal invalid for feq.
   TEST_FP_CMP_OP_S( 8, feq.s, 0x00, 0, NaN, 0)
   TEST_FP_CMP_OP_S( 9, feq.s, 0x00, 0, NaN, NaN)
-  TEST_FP_CMP_OP_S(10, feq.s, 0x10, 0, 0f:7f800001, 0)
+  TEST_FP_CMP_OP_S(10, feq.s, 0x10, 0, sNaNf, 0)
 
   # qNaN should signal invalid for fle/flt.
   TEST_FP_CMP_OP_S(11, flt.s, 0x10, 0, NaN, 0)
   TEST_FP_CMP_OP_S(12, flt.s, 0x10, 0, NaN, NaN)
-  TEST_FP_CMP_OP_S(13, flt.s, 0x10, 0, 0f:7f800001, 0)
+  TEST_FP_CMP_OP_S(13, flt.s, 0x10, 0, sNaNf, 0)
   TEST_FP_CMP_OP_S(14, fle.s, 0x10, 0, NaN, 0)
   TEST_FP_CMP_OP_S(15, fle.s, 0x10, 0, NaN, NaN)
-  TEST_FP_CMP_OP_S(16, fle.s, 0x10, 0, 0f:7f800001, 0)
+  TEST_FP_CMP_OP_S(16, fle.s, 0x10, 0, sNaNf, 0)
 
   TEST_PASSFAIL