Merge branch 'tommythorn-master'

[riscv-tests.git] / isa / rv64ui / srlw.S

diff --git a/isa/rv64ui/srlw.S b/isa/rv64ui/srlw.S
index d10361131e2f2709848baa801ee0264e762b3bad..f0d1daefe422fcc6138a1b128d9293a8b5443309 100644 (file)
--- a/isa/rv64ui/srlw.S
+++ b/isa/rv64ui/srlw.S
@@ -1,3 +1,5 @@
+# See LICENSE for license details.
+
 #*****************************************************************************
 # srlw.S
 #-----------------------------------------------------------------------------
@@ -41,6 +43,13 @@ RVTEST_CODE_BEGIN
   TEST_RR_OP( 20, srlw, 0x0000000000008484, 0x0000000021212121, 0xffffffffffffffee );
   TEST_RR_OP( 21, srlw, 0x0000000000000000, 0x0000000021212121, 0xffffffffffffffff );
 
+  # Verify that shifts ignore top 32 (using true 64-bit values)
+
+  TEST_RR_OP( 44, srlw, 0x0000000012345678, 0xffffffff12345678, 0 );
+  TEST_RR_OP( 45, srlw, 0x0000000001234567, 0xffffffff12345678, 4 );
+  TEST_RR_OP( 46, srlw, 0xffffffff92345678, 0x0000000092345678, 0 );
+  TEST_RR_OP( 47, srlw, 0x0000000009234567, 0x0000000092345678, 4 );
+
   #-------------------------------------------------------------
   # Source/Destination tests
   #-------------------------------------------------------------