correctly set SR_EA bit for all vector physical tests

[riscv-tests.git] / isa / rv64uv / amomaxu_d.S

diff --git a/isa/rv64uv/amomaxu_d.S b/isa/rv64uv/amomaxu_d.S
index 679c04dae74bfc141853bf279f612e117915036f..95d8fce64213d91ef89d5555f6750f18258694ee 100644 (file)
--- a/isa/rv64uv/amomaxu_d.S
+++ b/isa/rv64uv/amomaxu_d.S
@@ -8,7 +8,7 @@
 #include "riscv_test.h"
 #include "test_macros.h"
 
-RVTEST_RV64U
+RVTEST_RV64UV
 RVTEST_CODE_BEGIN
 
   vsetcfg 4,0