correctly set SR_EA bit for all vector physical tests

[riscv-tests.git] / isa / rv64uv / amomaxu_w.S

diff --git a/isa/rv64uv/amomaxu_w.S b/isa/rv64uv/amomaxu_w.S
index 342d931c04e1fd8abbb2591b465546584b957a06..feac563418b2af9ab4c4ce34701237abece6acf1 100644 (file)
--- a/isa/rv64uv/amomaxu_w.S
+++ b/isa/rv64uv/amomaxu_w.S
@@ -8,7 +8,7 @@
 #include "riscv_test.h"
 #include "test_macros.h"
 
-RVTEST_RV64U
+RVTEST_RV64UV
 RVTEST_CODE_BEGIN
 
   vsetcfg 4,0