projects / riscv-tests.git / blobdiff
? search:
summary | shortlog | log | commit | commitdiff | tree
raw | inline | side by side
correctly set SR_EA bit for all vector physical tests
[riscv-tests.git] / isa / rv64uv / fcvt.S
diff --git a/isa/rv64uv/fcvt.S b/isa/rv64uv/fcvt.S
index 180712f74de7bfff811bad720333bc7579af060d..227a154ce9fa110a35c90cb7336304e93e4891b5 100644 (file)
--- a/isa/rv64uv/fcvt.S
+++ b/isa/rv64uv/fcvt.S
@@ -8,7 +8,7 @@
 #include "riscv_test.h"
 #include "test_macros.h"
 
-RVTEST_RV64U
+RVTEST_RV64UV
 RVTEST_CODE_BEGIN
 
   vsetcfg 32,32