X-Git-Url: https://git.libre-soc.org/?p=riscv-tests.git;a=blobdiff_plain;f=benchmarks%2Fcommon%2Fcrt.S;h=be03ebbdb3e6b9a54ea835225d8e89963b3bb1d7;hp=563360a7de7675aea56d3f29f07d17f6c6b40c58;hb=8aebc7e29009096e0c5bd2a3ab7bc31271647020;hpb=26015d8c21fe1e8e34e36ffd1c83de7b08ad4902

diff --git a/benchmarks/common/crt.S b/benchmarks/common/crt.S
index 563360a..be03ebb 100644
--- a/benchmarks/common/crt.S
+++ b/benchmarks/common/crt.S
@@ -1,17 +1,23 @@
-#include "pcr.h"
+# See LICENSE for license details.
 
-  .data
-  .globl _heapend
-  .globl environ
-_heapend:
-  .word 0
-environ:
-  .word 0
+#include "encoding.h"
 
-  .text
-  .globl _start
+#if __riscv_xlen == 64
+# define LREG ld
+# define SREG sd
+# define REGBYTES 8
+#else
+# define LREG lw
+# define SREG sw
+# define REGBYTES 4
+#endif
 
+  .section ".text.init"
+  .globl _start
 _start:
+  la t0, trap_entry
+  csrw mtvec, t0
+
   li  x1, 0
   li  x2, 0
   li  x3, 0
@@ -44,19 +50,25 @@ _start:
   li  x30,0
   li  x31,0
 
-#ifdef __riscv64
-  setpcr status, SR_S64
-  setpcr status, SR_U64
-#endif
-
-  # enable fp
-  setpcr status, SR_EF
+  # enable FPU and accelerator if present
+  li t0, MSTATUS_FS | MSTATUS_XS
+  csrs mstatus, t0
 
-  # enable vec
-  setpcr t0, status, SR_EV
+  # make sure XLEN agrees with compilation choice
+  li t0, 1
+  slli t0, t0, 31
+#if __riscv_xlen == 64
+  bgez t0, 1f
+#else
+  bltz t0, 1f
+#endif
+  li a0, 1
+  sw a0, tohost, t0
+1:
 
-  ## if that didn't stick, we don't have an FPU, so don't initialize it
-  and t0, t0, SR_EF
+#ifdef __riscv_flen
+  # initialize FPU if we have one
+  andi t0, t0, 1 << ('f' - 'a')
   beqz t0, 1f
 
   fssr    x0
@@ -92,50 +104,129 @@ _start:
   fmv.s.x f29,x0
   fmv.s.x f30,x0
   fmv.s.x f31,x0
+#endif
+
 1:
 
-  lui a0, %hi(trap_entry)    
-  add a0, a0, %lo(trap_entry)
-  mtpcr a0, evec
-
-  lui a0, %hi(main)    
-  add a0, a0, %lo(main)
-  mtpcr a0, epc
-
-  # only allow core 0 to proceed
-1:mfpcr a0, hartid
-  bnez a0, 1b
-
-  la  sp,stacktop
-  
-  # jmp to main as a user program
-  eret 
-1:b 1b
-
-.align 4
-.globl trap_entry
-trap_entry:                # only check for SYS_exit, otherwise crash out
-  li a3, 1337              # magic "bad things" happened error code
-  mfpcr a1, cause
-  li a2, 6                 # syscall exception number
-  bne a1, a2, exit_error
-handle_syscall:
-  li a1, 93                # SYS_exit number
-  bne v0, a1, exit_error
-  li a1, 1                 # successful exit code
-  move a3, a0
-  bne a3, a1, exit_error
-  mtpcr a1, tohost         # exit successfully (tohost == 1)
-1:b 1b
-exit_error:
-  sll a3, a3, 1
-  or  a3, a3, 1
-  mtpcr a3, tohost
-1:b 1b
-
-  .bss
-  .globl stacktop
-
-  .align 4
-  .skip 131072
-stacktop:
+  # initialize global pointer
+  la gp, _gp
+
+  la  tp, _end + 63
+  and tp, tp, -64
+
+  # get core id
+  csrr a0, mhartid
+  # for now, assume only 1 core
+  li a1, 1
+1:bgeu a0, a1, 1b
+
+  # give each core 128KB of stack + TLS
+#define STKSHIFT 17
+  sll a2, a0, STKSHIFT
+  add tp, tp, a2
+  add sp, a0, 1
+  sll sp, sp, STKSHIFT
+  add sp, sp, tp
+
+  j _init
+
+  .align 2
+trap_entry:
+  addi sp, sp, -272
+
+  SREG x1, 1*REGBYTES(sp)
+  SREG x2, 2*REGBYTES(sp)
+  SREG x3, 3*REGBYTES(sp)
+  SREG x4, 4*REGBYTES(sp)
+  SREG x5, 5*REGBYTES(sp)
+  SREG x6, 6*REGBYTES(sp)
+  SREG x7, 7*REGBYTES(sp)
+  SREG x8, 8*REGBYTES(sp)
+  SREG x9, 9*REGBYTES(sp)
+  SREG x10, 10*REGBYTES(sp)
+  SREG x11, 11*REGBYTES(sp)
+  SREG x12, 12*REGBYTES(sp)
+  SREG x13, 13*REGBYTES(sp)
+  SREG x14, 14*REGBYTES(sp)
+  SREG x15, 15*REGBYTES(sp)
+  SREG x16, 16*REGBYTES(sp)
+  SREG x17, 17*REGBYTES(sp)
+  SREG x18, 18*REGBYTES(sp)
+  SREG x19, 19*REGBYTES(sp)
+  SREG x20, 20*REGBYTES(sp)
+  SREG x21, 21*REGBYTES(sp)
+  SREG x22, 22*REGBYTES(sp)
+  SREG x23, 23*REGBYTES(sp)
+  SREG x24, 24*REGBYTES(sp)
+  SREG x25, 25*REGBYTES(sp)
+  SREG x26, 26*REGBYTES(sp)
+  SREG x27, 27*REGBYTES(sp)
+  SREG x28, 28*REGBYTES(sp)
+  SREG x29, 29*REGBYTES(sp)
+  SREG x30, 30*REGBYTES(sp)
+  SREG x31, 31*REGBYTES(sp)
+
+  csrr a0, mcause
+  csrr a1, mepc
+  mv a2, sp
+  jal handle_trap
+  csrw mepc, a0
+
+  # Remain in M-mode after eret
+  li t0, MSTATUS_MPP
+  csrs mstatus, t0
+
+  LREG x1, 1*REGBYTES(sp)
+  LREG x2, 2*REGBYTES(sp)
+  LREG x3, 3*REGBYTES(sp)
+  LREG x4, 4*REGBYTES(sp)
+  LREG x5, 5*REGBYTES(sp)
+  LREG x6, 6*REGBYTES(sp)
+  LREG x7, 7*REGBYTES(sp)
+  LREG x8, 8*REGBYTES(sp)
+  LREG x9, 9*REGBYTES(sp)
+  LREG x10, 10*REGBYTES(sp)
+  LREG x11, 11*REGBYTES(sp)
+  LREG x12, 12*REGBYTES(sp)
+  LREG x13, 13*REGBYTES(sp)
+  LREG x14, 14*REGBYTES(sp)
+  LREG x15, 15*REGBYTES(sp)
+  LREG x16, 16*REGBYTES(sp)
+  LREG x17, 17*REGBYTES(sp)
+  LREG x18, 18*REGBYTES(sp)
+  LREG x19, 19*REGBYTES(sp)
+  LREG x20, 20*REGBYTES(sp)
+  LREG x21, 21*REGBYTES(sp)
+  LREG x22, 22*REGBYTES(sp)
+  LREG x23, 23*REGBYTES(sp)
+  LREG x24, 24*REGBYTES(sp)
+  LREG x25, 25*REGBYTES(sp)
+  LREG x26, 26*REGBYTES(sp)
+  LREG x27, 27*REGBYTES(sp)
+  LREG x28, 28*REGBYTES(sp)
+  LREG x29, 29*REGBYTES(sp)
+  LREG x30, 30*REGBYTES(sp)
+  LREG x31, 31*REGBYTES(sp)
+
+  addi sp, sp, 272
+  mret
+
+.section ".tdata.begin"
+.globl _tdata_begin
+_tdata_begin:
+
+.section ".tdata.end"
+.globl _tdata_end
+_tdata_end:
+
+.section ".tbss.end"
+.globl _tbss_end
+_tbss_end:
+
+.section ".tohost","aw",@progbits
+.align 6
+.globl tohost
+tohost: .dword 0
+.align 6
+.globl fromhost
+fromhost: .dword 0