X-Git-Url: https://git.libre-soc.org/?p=riscv-tests.git;a=blobdiff_plain;f=benchmarks%2Fcommon%2Futil.h;h=081cfd634526d875bcde36eb0c0ce61346677a1a;hp=10f3169aa5608a074851eeec7b1436682449b9fb;hb=3f1859129af6d26a3357cc1120c75e89d2aa8aaf;hpb=b374fd10b2b36124bb6813211a7ec690e1fa8350

diff --git a/benchmarks/common/util.h b/benchmarks/common/util.h
index 10f3169..081cfd6 100644
--- a/benchmarks/common/util.h
+++ b/benchmarks/common/util.h
@@ -1,16 +1,47 @@
-// helpful utility and synch functions 
-
-// relies on defining "ncores" before including this file...
+// See LICENSE for license details.
 
 #ifndef __UTIL_H
 #define __UTIL_H
 
-#include <machine/syscall.h>
+extern void setStats(int enable);
+
+#include <stdint.h>
+
+#define static_assert(cond) switch(0) { case 0: case !!(long)(cond): ; }
+
+static int verify(int n, const volatile int* test, const int* verify)
+{
+  int i;
+  // Unrolled for faster verification
+  for (i = 0; i < n/2*2; i+=2)
+  {
+    int t0 = test[i], t1 = test[i+1];
+    int v0 = verify[i], v1 = verify[i+1];
+    if (t0 != v0) return i+1;
+    if (t1 != v1) return i+2;
+  }
+  if (n % 2 != 0 && test[n-1] != verify[n-1])
+    return n;
+  return 0;
+}
 
-#define rdcycle() ({ unsigned long _c; asm volatile ("rdcycle %0" : "=r"(_c) :: "memory"); _c; })
-#define rdinstret() ({ unsigned long _c; asm volatile ("rdinstret %0" : "=r"(_c) :: "memory"); _c; })
-                            
-void __attribute__((noinline)) barrier()
+static int verifyDouble(int n, const volatile double* test, const double* verify)
+{
+  int i;
+  // Unrolled for faster verification
+  for (i = 0; i < n/2*2; i+=2)
+  {
+    double t0 = test[i], t1 = test[i+1];
+    double v0 = verify[i], v1 = verify[i+1];
+    int eq1 = t0 == v0, eq2 = t1 == v1;
+    if (!(eq1 & eq2)) return i+1+eq1;
+  }
+  if (n % 2 != 0 && test[n-1] != verify[n-1])
+    return n;
+  return 0;
+}
+
+static void __attribute__((noinline)) barrier(int ncores)
 {
   static volatile int sense;
   static volatile int count;
@@ -30,31 +61,30 @@ void __attribute__((noinline)) barrier()
   __sync_synchronize();
 }
 
+static uint64_t lfsr(uint64_t x)
+{
+  uint64_t bit = (x ^ (x >> 1)) & 1;
+  return (x >> 1) | (bit << 62);
+}
 
-
-
-
-void finishTest(int test_result)
+static uintptr_t insn_len(uintptr_t pc)
 {
-#if HOST_DEBUG
-  if ( test_result == 1 )
-    printf( "*** PASSED ***\n" );
-  else
-    printf( "*** FAILED *** (tohost = %d)\n", test_result);
-  exit(0);
-#else
-   {
-      // perform exit syscall
-      asm volatile(
-          "move a0,%0 ;"
-          "li a1,0    ;"
-          "li a2,0    ;"
-          "li a3,0    ;"
-          "li v0,%1   ;"
-          "scall" : : "r"(test_result) , "i"(SYS_exit));
-   }
-#endif
+  return (*(unsigned short*)pc & 3) ? 4 : 2;
 }
 
-#endif //__UTIL_H
+#ifdef __riscv
+#include "encoding.h"
+#endif
 
+#define stringify_1(s) #s
+#define stringify(s) stringify_1(s)
+#define stats(code, iter) do { \
+    unsigned long _c = -read_csr(mcycle), _i = -read_csr(minstret); \
+    code; \
+    _c += read_csr(mcycle), _i += read_csr(minstret); \
+    if (cid == 0) \
+      printf("\n%s: %ld cycles, %ld.%ld cycles/iter, %ld.%ld CPI\n", \
+             stringify(code), _c, _c/iter, 10*_c/iter%10, _c/_i, 10*_c/_i%10); \
+  } while(0)
+
+#endif //__UTIL_H