X-Git-Url: https://git.libre-soc.org/?p=riscv-tests.git;a=blobdiff_plain;f=benchmarks%2Fdhrystone%2Fdhrystone.h;h=89616afd3b45fec691f538ee101e9038db426b6e;hp=767a65728b796ab462b593071ed2f39060a27bcb;hb=35c6ac438af5086510fe120b575090cf8e9b917b;hpb=4bead73f52ad5a43a5400179928aa0aa97b79b35

diff --git a/benchmarks/dhrystone/dhrystone.h b/benchmarks/dhrystone/dhrystone.h
index 767a657..89616af 100644
--- a/benchmarks/dhrystone/dhrystone.h
+++ b/benchmarks/dhrystone/dhrystone.h
@@ -381,11 +381,11 @@ extern clock_t	clock();
 
 #elif defined(__riscv)
 
-#define HZ 976563
+#define HZ 1000000
 #define Too_Small_Time 1
 #define CLOCK_TYPE "rdcycle()"
-#define Start_Timer() Begin_Time = rdcycle()
-#define Stop_Timer() End_Time = rdcycle()
+#define Start_Timer() Begin_Time = read_csr(mcycle)
+#define Stop_Timer() End_Time = read_csr(mcycle)
 
 #else
                 /* Use times(2) time function unless    */