X-Git-Url: https://git.libre-soc.org/?p=riscv-tests.git;a=blobdiff_plain;f=debug%2Fgdbserver.py;h=027d387b7e623842f7affd353033f55e807eddee;hp=88c565765c4bffe174b523c9b8a551f4b2b29c7c;hb=1147b6cc3de277e63744d25e8d6adcbd5ed55856;hpb=6990284b8eab8d4e4f57f82ac8918913c5c63e97 diff --git a/debug/gdbserver.py b/debug/gdbserver.py index 88c5657..027d387 100755 --- a/debug/gdbserver.py +++ b/debug/gdbserver.py @@ -10,48 +10,150 @@ import time import random import binascii +def ihex_line(address, record_type, data): + assert len(data) < 128 + line = ":%02X%04X%02X" % (len(data), address, record_type) + check = len(data) + check += address % 256 + check += address >> 8 + check += record_type + for char in data: + value = ord(char) + check += value + line += "%02X" % value + line += "%02X\n" % ((256-check)%256) + return line + +def ihex_parse(line): + assert line.startswith(":") + line = line[1:] + data_len = int(line[:2], 16) + address = int(line[2:6], 16) + record_type = int(line[6:8], 16) + data = "" + for i in range(data_len): + data += "%c" % int(line[8+2*i:10+2*i], 16) + return record_type, address, data + class DeleteServer(unittest.TestCase): def tearDown(self): del self.server -class MemoryTest(DeleteServer): +class SimpleRegisterTest(DeleteServer): + def setUp(self): + self.server = target.server() + self.gdb = testlib.Gdb() + self.gdb.command("target extended-remote localhost:%d" % self.server.port) + + # 0x13 is nop + self.gdb.command("p *((int*) 0x%x)=0x13" % target.ram) + self.gdb.command("p *((int*) 0x%x)=0x13" % (target.ram + 4)) + self.gdb.command("p *((int*) 0x%x)=0x13" % (target.ram + 8)) + self.gdb.p("$pc=0x%x" % target.ram) + + def check_reg(self, name): + a = random.randrange(1< last_pc and pc - last_pc <= 4): + advances += 1 + else: + jumps += 1 last_pc = pc + # Some basic sanity that we're not running between breakpoints or + # something. + self.assertGreater(jumps, 10) + self.assertGreater(advances, 50) def test_exit(self): self.exit() + def test_symbols(self): + self.gdb.b("main") + self.gdb.b("rot13") + output = self.gdb.c() + self.assertIn(", main ", output) + output = self.gdb.c() + self.assertIn(", rot13 ", output) + def test_breakpoint(self): self.gdb.b("rot13") # The breakpoint should be hit exactly 2 times. for i in range(2): output = self.gdb.c() + self.gdb.p("$pc") + self.assertIn("Breakpoint ", output) + #TODO self.assertIn("rot13 ", output) + self.exit() + + def test_hwbp_1(self): + self.gdb.hbreak("rot13") + # The breakpoint should be hit exactly 2 times. + for i in range(2): + output = self.gdb.c() + self.gdb.p("$pc") + self.assertIn("Breakpoint ", output) + #TODO self.assertIn("rot13 ", output) + self.exit() + + def test_hwbp_2(self): + self.gdb.hbreak("main") + self.gdb.hbreak("rot13") + # We should hit 3 breakpoints. + for i in range(3): + output = self.gdb.c() + self.gdb.p("$pc") self.assertIn("Breakpoint ", output) + #TODO self.assertIn("rot13 ", output) self.exit() + def test_too_many_hwbp(self): + for i in range(30): + self.gdb.hbreak("*rot13 + %d" % (i * 4)) + + output = self.gdb.c() + self.assertIn("Cannot insert hardware breakpoint", output) + def test_registers(self): + # Get to a point in the code where some registers have actually been + # used. self.gdb.b("rot13") self.gdb.c() + self.gdb.c() # Try both forms to test gdb. for cmd in ("info all-registers", "info registers all"): output = self.gdb.command(cmd) self.assertNotIn("Could not", output) for reg in ('zero', 'ra', 'sp', 'gp', 'tp'): self.assertIn(reg, output) + + #TODO # mcpuid is one of the few registers that should have the high bit set # (for rv64). # Leave this commented out until gdb and spike agree on the encoding of # mcpuid (which is going to be renamed to misa in any case). #self.assertRegexpMatches(output, ".*mcpuid *0x80") + #TODO: # The instret register should always be changing. - last_instret = None - for _ in range(5): - instret = self.gdb.p("$instret") - self.assertNotEqual(instret, last_instret) - last_instret = instret - self.gdb.command("stepi") + #last_instret = None + #for _ in range(5): + # instret = self.gdb.p("$instret") + # self.assertNotEqual(instret, last_instret) + # last_instret = instret + # self.gdb.stepi() self.exit() @@ -119,15 +277,33 @@ class DebugTest(DeleteServer): """Sending gdb ^C while the program is running should cause it to halt.""" self.gdb.b("main:start") self.gdb.c() - self.gdb.command("p i=123"); + self.gdb.p("i=123"); self.gdb.c(wait=False) time.sleep(0.1) output = self.gdb.interrupt() - assert "main" in output + #TODO: assert "main" in output self.assertGreater(self.gdb.p("j"), 10) self.gdb.p("i=0"); self.exit() +class StepTest(DeleteServer): + def setUp(self): + self.binary = target.compile("programs/step.S") + self.server = target.server() + self.gdb = testlib.Gdb() + self.gdb.command("file %s" % self.binary) + self.gdb.command("target extended-remote localhost:%d" % self.server.port) + self.gdb.load() + self.gdb.b("main") + self.gdb.c() + + def test_step(self): + main = self.gdb.p("$pc") + for expected in (4, 0xc, 0x10, 0x18, 0x14, 0x14): + self.gdb.stepi() + pc = self.gdb.p("$pc") + self.assertEqual(pc - main, expected) + class RegsTest(DeleteServer): def setUp(self): self.binary = target.compile("programs/regs.S") @@ -135,30 +311,28 @@ class RegsTest(DeleteServer): self.gdb = testlib.Gdb() self.gdb.command("file %s" % self.binary) self.gdb.command("target extended-remote localhost:%d" % self.server.port) - self.gdb.command("load") + self.gdb.load() + self.gdb.b("main") + self.gdb.b("handle_trap") + self.gdb.c() def test_write_gprs(self): - # Note a0 is missing from this list since it's used to hold the - # address. - regs = ("ra", "sp", "gp", "tp", "t0", "t1", "t2", "fp", "s1", - "a1", "a2", "a3", "a4", "a5", "a6", "a7", "s2", "s3", "s4", - "s5", "s6", "s7", "s8", "s9", "s10", "s11", "t3", "t4", "t5", - "t6") + regs = [("x%d" % n) for n in range(2, 32)] - self.gdb.command("p $pc=write_regs") + self.gdb.p("$pc=write_regs") for i, r in enumerate(regs): self.gdb.command("p $%s=%d" % (r, (0xdeadbeef<\n") + fd.write("unsigned int crc32a(uint8_t *message, unsigned int size);\n") fd.write("uint32_t length = %d;\n" % length) fd.write("uint8_t d[%d] = {\n" % length) self.crc = 0 @@ -204,57 +370,56 @@ class DownloadTest(DeleteServer): fd.write("\n"); fd.write("};\n"); fd.write("uint8_t *data = &d[0];\n"); + fd.write("uint32_t main() { return crc32a(data, length); }\n") fd.close() - self.binary = target.compile("checksum.c", "data.c", "start.S", - "-mcmodel=medany", - "-T", "standalone.lds", - "-nostartfiles" - ) - self.server = target.server(None, halted=True) + if self.crc < 0: + self.crc += 2**32 + + self.binary = target.compile("download.c", "programs/checksum.c") + self.server = target.server() self.gdb = testlib.Gdb() self.gdb.command("file %s" % self.binary) self.gdb.command("target extended-remote localhost:%d" % self.server.port) def test_download(self): - output = self.gdb.command("load") - self.assertNotIn("failed", output) - self.assertIn("Transfer rate", output) - self.gdb.command("b done") + output = self.gdb.load() + self.gdb.command("b _exit") self.gdb.c() - result = self.gdb.p("$a0") - self.assertEqual(self.crc, result) + self.assertEqual(self.gdb.p("status"), self.crc) class MprvTest(DeleteServer): def setUp(self): - self.binary = target.compile("mprv.S", "-T", "standalone.lds", - "-nostartfiles") - self.server = target.server(None, halted=True) + self.binary = target.compile("programs/mprv.S") + self.server = target.server() self.gdb = testlib.Gdb() self.gdb.command("file %s" % self.binary) self.gdb.command("target extended-remote localhost:%d" % self.server.port) - self.gdb.command("load") + self.gdb.load() def test_mprv(self): """Test that the debugger can access memory when MPRV is set.""" self.gdb.c(wait=False) + time.sleep(0.5) self.gdb.interrupt() output = self.gdb.command("p/x *(int*)(((char*)&data)-0x80000000)") self.assertIn("0xbead", output) class Target(object): + directory = None + def server(self): raise NotImplementedError def compile(self, *sources): return testlib.compile(sources + - ("targets/%s/entry.S" % self.name, "programs/init.c", + ("programs/entry.S", "programs/init.c", "-I", "../env", - "-T", "targets/%s/link.lds" % self.name, + "-T", "targets/%s/link.lds" % (self.directory or self.name), "-nostartfiles", "-mcmodel=medany"), xlen=self.xlen) -class SpikeTarget(Target): +class Spike64Target(Target): name = "spike" xlen = 64 ram = 0x80010000 @@ -262,6 +427,15 @@ class SpikeTarget(Target): def server(self): return testlib.Spike(parsed.cmd, halted=True) +class Spike32Target(Target): + name = "spike32" + directory = "spike" + xlen = 32 + ram = 0x80010000 + + def server(self): + return testlib.Spike(parsed.cmd, halted=True, xlen=32) + class MicroSemiTarget(Target): name = "m2gl_m2s" xlen = 32 @@ -272,12 +446,18 @@ class MicroSemiTarget(Target): config="targets/%s/openocd.cfg" % self.name) targets = [ - SpikeTarget, + Spike32Target, + Spike64Target, MicroSemiTarget ] def main(): - parser = argparse.ArgumentParser() + parser = argparse.ArgumentParser( + epilog=""" + Example command line from the real world: + Run all RegsTest cases against a MicroSemi m2gl_m2s board, with custom openocd command: + ./gdbserver.py --m2gl_m2s --cmd "$HOME/SiFive/openocd/src/openocd -s $HOME/SiFive/openocd/tcl -d" -- -vf RegsTest + """) group = parser.add_mutually_exclusive_group(required=True) for t in targets: group.add_argument("--%s" % t.name, action="store_const", const=t,