X-Git-Url: https://git.libre-soc.org/?p=riscv-tests.git;a=blobdiff_plain;f=isa%2Fmacros%2Fvector%2Ftest_macros.h;h=7ee926293b7384a1b10765c52db7011e05fb2308;hp=a3672919e28121c8d14c901508a4d4dad8b7a288;hb=2129261a6567a0d9705f7b7c7609d22b1d183b00;hpb=81ad66f25ce4c15180e558696961bd8eaf967fea diff --git a/isa/macros/vector/test_macros.h b/isa/macros/vector/test_macros.h index a367291..7ee9262 100644 --- a/isa/macros/vector/test_macros.h +++ b/isa/macros/vector/test_macros.h @@ -1,11 +1,10 @@ +// See LICENSE for license details. + #ifndef __TEST_MACROS_VECTOR_H #define __TEST_MACROS_VECTOR_H -#define TEST_DATA \ - .data; \ - .align 3; \ -dst: \ - .skip 16384; \ +#undef EXTRA_INIT +#define EXTRA_INIT RVTEST_VEC_ENABLE #----------------------------------------------------------------------- # Helper macros @@ -18,16 +17,17 @@ dst: \ #define TEST_CASE_NREG( testnum, nxreg, nfreg, testreg, correctval, code... ) \ test_ ## testnum: \ + vsetcfg nxreg,nfreg; \ li a3,2048; \ - vvcfgivl a3,a3,nxreg,nfreg; \ - lui a0,%hi(vtcode ## testnum ); \ - vf %lo(vtcode ## testnum )(a0); \ + vsetvl a3,a3; \ +1:auipc a0,%pcrel_hi(vtcode ## testnum); \ + vf %pcrel_lo(1b)(a0); \ la a4,dst; \ vsd v ## testreg, a4; \ - fence.v.l; \ + fence; \ li a1,correctval; \ li a2,0; \ - li x28, testnum; \ + li TESTNUM, testnum; \ test_loop ## testnum: \ ld a0,0(a4); \ beq a0,a1,skip ## testnum; \ @@ -57,26 +57,33 @@ next ## testnum : #define TEST_INSERT_NOPS_9 nop; TEST_INSERT_NOPS_8 #define TEST_INSERT_NOPS_10 nop; TEST_INSERT_NOPS_9 + +#----------------------------------------------------------------------- +# RV64UI MACROS +#----------------------------------------------------------------------- + #----------------------------------------------------------------------- # Tests for instructions with immediate operand #----------------------------------------------------------------------- +#define SEXT_IMM(x) ((x) | (-(((x) >> 11) & 1) << 11)) + #define TEST_IMM_OP( testnum, inst, result, val1, imm ) \ TEST_CASE_NREG( testnum, 4, 0, x3, result, \ li x1, val1; \ - inst x3, x1, imm; \ + inst x3, x1, SEXT_IMM(imm); \ ) #define TEST_IMM_SRC1_EQ_DEST( testnum, inst, result, val1, imm ) \ TEST_CASE_NREG( testnum, 2, 0, x1, result, \ li x1, val1; \ - inst x1, x1, imm; \ + inst x1, x1, SEXT_IMM(imm); \ ) #define TEST_IMM_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \ TEST_CASE_NREG( testnum, 5, 0, x4, result, \ li x1, val1; \ - inst x3, x1, imm; \ + inst x3, x1, SEXT_IMM(imm); \ TEST_INSERT_NOPS_ ## nop_cycles \ addi x4, x3, 0; \ ) @@ -85,18 +92,18 @@ next ## testnum : TEST_CASE_NREG( testnum, 4, 0, x3, result, \ li x1, val1; \ TEST_INSERT_NOPS_ ## nop_cycles \ - inst x3, x1, imm; \ + inst x3, x1, SEXT_IMM(imm); \ ) #define TEST_IMM_ZEROSRC1( testnum, inst, result, imm ) \ TEST_CASE_NREG( testnum, 2, 0, x1, result, \ - inst x1, x0, imm; \ + inst x1, x0, SEXT_IMM(imm); \ ) #define TEST_IMM_ZERODEST( testnum, inst, val1, imm ) \ TEST_CASE_NREG( testnum, 2, 0, x0, 0, \ li x1, val1; \ - inst x0, x1, imm; \ + inst x0, x1, SEXT_IMM(imm); \ ) #----------------------------------------------------------------------- @@ -205,6 +212,206 @@ next ## testnum : inst x0, x1, x2; \ ) + +#----------------------------------------------------------------------- +# RV64UF MACROS +#----------------------------------------------------------------------- + +#----------------------------------------------------------------------- +# Tests floating-point instructions +#----------------------------------------------------------------------- + +#define TEST_FP_OP_S_INTERNAL_NREG( testnum, nxreg, nfreg, result, val1, val2, val3, code... ) \ +test_ ## testnum: \ + vsetcfg nxreg,nfreg; \ + li a3,2048; \ + vsetvl a3,a3; \ + la a5, test_ ## testnum ## _data ;\ + vflstw vf0, a5, x0; \ + addi a5,a5,4; \ + vflstw vf1, a5, x0; \ + addi a5,a5,4; \ + vflstw vf2, a5, x0; \ + addi a5,a5,4; \ +1:auipc a0,%pcrel_hi(vtcode ## testnum); \ + vf %pcrel_lo(1b)(a0); \ + la a4,dst; \ + vsw vx1, a4; \ + fence; \ + lw a1, 0(a5); \ + li a2, 0; \ + li TESTNUM, testnum; \ +test_loop ## testnum: \ + lw a0,0(a4); \ + beq a0,a1,skip ## testnum; \ + j fail; \ +skip ## testnum : \ + addi a4,a4,4; \ + addi a2,a2,1; \ + bne a2,a3,test_loop ## testnum; \ + j 1f; \ +vtcode ## testnum : \ + code; \ + stop; \ + .align 2; \ + test_ ## testnum ## _data: \ + .float val1; \ + .float val2; \ + .float val3; \ + .result; \ +1: + +#define TEST_FP_OP_D_INTERNAL_NREG( testnum, nxreg, nfreg, result, val1, val2, val3, code... ) \ +test_ ## testnum: \ + vsetcfg nxreg,nfreg; \ + li a3,2048; \ + vsetvl a3,a3; \ + la a5, test_ ## testnum ## _data ;\ + vflstd vf0, a5, x0; \ + addi a5,a5,8; \ + vflstd vf1, a5, x0; \ + addi a5,a5,8; \ + vflstd vf2, a5, x0; \ + addi a5,a5,8; \ +1:auipc a0,%pcrel_hi(vtcode ## testnum); \ + vf %pcrel_lo(1b)(a0); \ + la a4,dst; \ + vsd vx1, a4; \ + fence; \ + ld a1, 0(a5); \ + li a2, 0; \ + li TESTNUM, testnum; \ +test_loop ## testnum: \ + ld a0,0(a4); \ + beq a0,a1,skip ## testnum; \ + j fail; \ +skip ## testnum : \ + addi a4,a4,8; \ + addi a2,a2,1; \ + bne a2,a3,test_loop ## testnum; \ + j 1f; \ +vtcode ## testnum : \ + code; \ + stop; \ + .align 3; \ + test_ ## testnum ## _data: \ + .double val1; \ + .double val2; \ + .double val3; \ + .result; \ +1: + +#define TEST_FCVT_S_D( testnum, result, val1 ) \ + TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, double result, val1, 0.0, 0.0, \ + fcvt.s.d f3, f0; fcvt.d.s f3, f3; fmv.x.d x1, f3) + +#define TEST_FCVT_D_S( testnum, result, val1 ) \ + TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, float result, val1, 0.0, 0.0, \ + fcvt.d.s f3, f0; fcvt.s.d f3, f3; fmv.x.s x1, f3) + +#define TEST_FP_OP2_S( testnum, inst, flags, result, val1, val2 ) \ + TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, float result, val1, val2, 0.0, \ + inst f3, f0, f1; fmv.x.s x1, f3) + +#define TEST_FP_OP2_D( testnum, inst, flags, result, val1, val2 ) \ + TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, double result, val1, val2, 0.0, \ + inst f3, f0, f1; fmv.x.d x1, f3) + +#define TEST_FP_OP3_S( testnum, inst, flags, result, val1, val2, val3 ) \ + TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, float result, val1, val2, val3, \ + inst f3, f0, f1, f2; fmv.x.s x1, f3) + +#define TEST_FP_OP3_D( testnum, inst, flags, result, val1, val2, val3 ) \ + TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, double result, val1, val2, val3, \ + inst f3, f0, f1, f2; fmv.x.d x1, f3) + +#define TEST_FP_INT_OP_S( testnum, inst, flags, result, val1, rm ) \ + TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, word result, val1, 0.0, 0.0, \ + inst x1, f0, rm) + +#define TEST_FP_INT_OP_D( testnum, inst, flags, result, val1, rm ) \ + TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, dword result, val1, 0.0, 0.0, \ + inst x1, f0, rm) + +#define TEST_FP_CMP_OP_S( testnum, inst, result, val1, val2 ) \ + TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, word result, val1, val2, 0.0, \ + inst x1, f0, f1) + +#define TEST_FP_CMP_OP_D( testnum, inst, result, val1, val2 ) \ + TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, dword result, val1, val2, 0.0, \ + inst x1, f0, f1) + +#define TEST_INT_FP_OP_S( testnum, inst, result, val1 ) \ +test_ ## testnum: \ + vsetcfg 2,1; \ + li a3,2048; \ + vsetvl a3,a3; \ +1:auipc a0,%pcrel_hi(vtcode ## testnum); \ + vf %pcrel_lo(1b)(a0); \ + la a4,dst; \ + vsw vx1, a4; \ + fence; \ + la a5, test_ ## testnum ## _data ;\ + lw a1, 0(a5); \ + li a2, 0; \ + li TESTNUM, testnum; \ +test_loop ## testnum: \ + lw a0,0(a4); \ + beq a0,a1,skip ## testnum; \ + j fail; \ +skip ## testnum : \ + addi a4,a4,4; \ + addi a2,a2,1; \ + bne a2,a3,test_loop ## testnum; \ + j 1f; \ +vtcode ## testnum : \ + li x1, val1; \ + inst f0, x1; \ + fmv.x.s x1, f0; \ + stop; \ + .align 2; \ + test_ ## testnum ## _data: \ + .float result; \ +1: + +#define TEST_INT_FP_OP_D( testnum, inst, result, val1 ) \ +test_ ## testnum: \ + vsetcfg 2,1; \ + li a3,2048; \ + vsetvl a3,a3; \ +1:auipc a0,%pcrel_hi(vtcode ## testnum); \ + vf %pcrel_lo(1b)(a0); \ + la a4,dst; \ + vsd vx1, a4; \ + fence; \ + la a5, test_ ## testnum ## _data ;\ + ld a1, 0(a5); \ + li a2, 0; \ + li TESTNUM, testnum; \ +test_loop ## testnum: \ + ld a0,0(a4); \ + beq a0,a1,skip ## testnum; \ + j fail; \ +skip ## testnum : \ + addi a4,a4,8; \ + addi a2,a2,1; \ + bne a2,a3,test_loop ## testnum; \ + j 1f; \ +vtcode ## testnum : \ + li x1, val1; \ + inst f0, x1; \ + fmv.x.d x1, f0; \ + stop; \ + .align 3; \ + test_ ## testnum ## _data: \ + .double result; \ +1: + + +#----------------------------------------------------------------------- +# RV64UV MACROS +#----------------------------------------------------------------------- + #----------------------------------------------------------------------- # Test branch instructions #----------------------------------------------------------------------- @@ -319,15 +526,16 @@ next ## testnum : #define TEST_CASE_NREG_MEM( testnum, nxreg, nfreg, correctval, code... ) \ test_ ## testnum: \ + vsetcfg nxreg,nfreg; \ li a3,2048; \ - vvcfgivl a3,a3,nxreg,nfreg; \ - lui a0,%hi(vtcode ## testnum ); \ - vf %lo(vtcode ## testnum )(a0); \ + vsetvl a3,a3; \ +1:auipc a0,%pcrel_hi(vtcode ## testnum); \ + vf %pcrel_lo(1b)(a0); \ la a4,dst; \ - fence.v.l; \ + fence; \ li a1,correctval; \ li a2,0; \ - li x28, testnum; \ + li TESTNUM, testnum; \ test_loop ## testnum: \ ld a0,0(a4); \ beq a0,a1,skip ## testnum; \ @@ -385,200 +593,25 @@ next ## testnum : ) #----------------------------------------------------------------------- -# Tests floating-point instructions +# Pass and fail code (assumes test num is in TESTNUM) #----------------------------------------------------------------------- -#define TEST_FP_OP_S_INTERNAL_NREG( testnum, nxreg, nfreg, result, val1, val2, val3, code... ) \ -test_ ## testnum: \ - li a3,2048; \ - vvcfgivl a3,a3,nxreg,nfreg; \ - la a5, test_ ## testnum ## _data ;\ - vflstw vf0, a5, x0; \ - addi a5,a5,4; \ - vflstw vf1, a5, x0; \ - addi a5,a5,4; \ - vflstw vf2, a5, x0; \ - addi a5,a5,4; \ - lui a0,%hi(vtcode ## testnum ); \ - vf %lo(vtcode ## testnum )(a0); \ - la a4,dst; \ - vsw vx1, a4; \ - fence.v.l; \ - lw a1, 0(a5); \ - li a2, 0; \ - li x28, testnum; \ -test_loop ## testnum: \ - lw a0,0(a4); \ - beq a0,a1,skip ## testnum; \ - j fail; \ -skip ## testnum : \ - addi a4,a4,4; \ - addi a2,a2,1; \ - bne a2,a3,test_loop ## testnum; \ - b 1f; \ -vtcode ## testnum : \ - code; \ - stop; \ - .align 2; \ - test_ ## testnum ## _data: \ - .float val1; \ - .float val2; \ - .float val3; \ - .result; \ -1: - -#define TEST_FP_OP_D_INTERNAL_NREG( testnum, nxreg, nfreg, result, val1, val2, val3, code... ) \ -test_ ## testnum: \ - li a3,2048; \ - vvcfgivl a3,a3,nxreg,nfreg; \ - la a5, test_ ## testnum ## _data ;\ - vflstd vf0, a5, x0; \ - addi a5,a5,8; \ - vflstd vf1, a5, x0; \ - addi a5,a5,8; \ - vflstd vf2, a5, x0; \ - addi a5,a5,8; \ - lui a0,%hi(vtcode ## testnum ); \ - vf %lo(vtcode ## testnum )(a0); \ - la a4,dst; \ - vsd vx1, a4; \ - fence.v.l; \ - ld a1, 0(a5); \ - li a2, 0; \ - li x28, testnum; \ -test_loop ## testnum: \ - ld a0,0(a4); \ - beq a0,a1,skip ## testnum; \ - j fail; \ -skip ## testnum : \ - addi a4,a4,8; \ - addi a2,a2,1; \ - bne a2,a3,test_loop ## testnum; \ - b 1f; \ -vtcode ## testnum : \ - code; \ - stop; \ - .align 3; \ - test_ ## testnum ## _data: \ - .double val1; \ - .double val2; \ - .double val3; \ - .result; \ -1: - -#define TEST_FCVT_S_D( testnum, result, val1 ) \ - TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, double result, val1, 0.0, 0.0, \ - fcvt.s.d f3, f0; fcvt.d.s f3, f3; mftx.d x1, f3) - -#define TEST_FCVT_D_S( testnum, result, val1 ) \ - TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, float result, val1, 0.0, 0.0, \ - fcvt.d.s f3, f0; fcvt.s.d f3, f3; mftx.s x1, f3) - -#define TEST_FP_OP2_S( testnum, inst, result, val1, val2 ) \ - TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, float result, val1, val2, 0.0, \ - inst f3, f0, f1; mftx.s x1, f3) - -#define TEST_FP_OP2_D( testnum, inst, result, val1, val2 ) \ - TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, double result, val1, val2, 0.0, \ - inst f3, f0, f1; mftx.d x1, f3) - -#define TEST_FP_OP3_S( testnum, inst, result, val1, val2, val3 ) \ - TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, float result, val1, val2, val3, \ - inst f3, f0, f1, f2; mftx.s x1, f3) - -#define TEST_FP_OP3_D( testnum, inst, result, val1, val2, val3 ) \ - TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, double result, val1, val2, val3, \ - inst f3, f0, f1, f2; mftx.d x1, f3) - -#define TEST_FP_INT_OP_S( testnum, inst, result, val1, rm ) \ - TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, word result, val1, 0.0, 0.0, \ - inst x1, f0, rm) - -#define TEST_FP_INT_OP_D( testnum, inst, result, val1, rm ) \ - TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, dword result, val1, 0.0, 0.0, \ - inst x1, f0, rm) - -#define TEST_FP_CMP_OP_S( testnum, inst, result, val1, val2 ) \ - TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, word result, val1, val2, 0.0, \ - inst x1, f0, f1) - -#define TEST_FP_CMP_OP_D( testnum, inst, result, val1, val2 ) \ - TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, dword result, val1, val2, 0.0, \ - inst x1, f0, f1) - -#define TEST_INT_FP_OP_S( testnum, inst, result, val1 ) \ -test_ ## testnum: \ - li a3,2048; \ - vvcfgivl a3,a3,2,1; \ - lui a0,%hi(vtcode ## testnum ); \ - vf %lo(vtcode ## testnum )(a0); \ - la a4,dst; \ - vsw vx1, a4; \ - fence.v.l; \ - la a5, test_ ## testnum ## _data ;\ - lw a1, 0(a5); \ - li a2, 0; \ - li x28, testnum; \ -test_loop ## testnum: \ - lw a0,0(a4); \ - beq a0,a1,skip ## testnum; \ - j fail; \ -skip ## testnum : \ - addi a4,a4,4; \ - addi a2,a2,1; \ - bne a2,a3,test_loop ## testnum; \ - b 1f; \ -vtcode ## testnum : \ - li x1, val1; \ - inst f0, x1; \ - mftx.s x1, f0; \ - stop; \ - .align 2; \ - test_ ## testnum ## _data: \ - .float result; \ -1: +#define TEST_PASSFAIL \ + bne x0, TESTNUM, pass; \ +fail: \ + RVTEST_FAIL; \ +pass: \ + RVTEST_PASS \ -#define TEST_INT_FP_OP_D( testnum, inst, result, val1 ) \ -test_ ## testnum: \ - li a3,2048; \ - vvcfgivl a3,a3,2,1; \ - lui a0,%hi(vtcode ## testnum ); \ - vf %lo(vtcode ## testnum )(a0); \ - la a4,dst; \ - vsd vx1, a4; \ - fence.v.l; \ - la a5, test_ ## testnum ## _data ;\ - ld a1, 0(a5); \ - li a2, 0; \ - li x28, testnum; \ -test_loop ## testnum: \ - ld a0,0(a4); \ - beq a0,a1,skip ## testnum; \ - j fail; \ -skip ## testnum : \ - addi a4,a4,8; \ - addi a2,a2,1; \ - bne a2,a3,test_loop ## testnum; \ - b 1f; \ -vtcode ## testnum : \ - li x1, val1; \ - inst f0, x1; \ - mftx.d x1, f0; \ - stop; \ - .align 3; \ - test_ ## testnum ## _data: \ - .double result; \ -1: #----------------------------------------------------------------------- -# Pass and fail code (assumes test num is in x28) +# Test data section #----------------------------------------------------------------------- -#define TEST_PASSFAIL \ - bne x0, x28, pass; \ -fail: \ - RVTEST_FAIL \ -pass: \ - RVTEST_PASS \ +#define TEST_DATA \ + .data; \ + .align 3; \ +dst: \ + .skip 16384; \ #endif