X-Git-Url: https://git.libre-soc.org/?p=riscv-tests.git;a=blobdiff_plain;f=isa%2Frv32ui%2Fauipc.S;h=cca7781d7a1cd461da9de97298ffc6c8afacda84;hp=b5dbf88bec10bc3542ffc9b4e7b62f8e74211f02;hb=c50db79a8e549d7dd2112ff22d48be5e4b501fea;hpb=65487f641d7ca228938106d7c4d36a78e3990055

diff --git a/isa/rv32ui/auipc.S b/isa/rv32ui/auipc.S
index b5dbf88..cca7781 100644
--- a/isa/rv32ui/auipc.S
+++ b/isa/rv32ui/auipc.S
@@ -11,22 +11,18 @@
 RVTEST_RV32U
 RVTEST_CODE_BEGIN
 
-  TEST_CASE(2, a0, 1<<12, \
+  TEST_CASE(2, a0, 10000, \
     .align 3; \
-    auipc a0, 0x00001; \
+    lla a0, 1f + 10000; \
     jal a1, 1f; \
-    1: srl a1, a1, 12; \
-    sll a1, a1, 12; \
-    sub a0, a0, a1; \
+    1: sub a0, a0, a1; \
   )
 
-  TEST_CASE(3, a0, -1<<12, \
+  TEST_CASE(3, a0, -10000, \
     .align 3; \
-    auipc a0, 0xfffff; \
+    lla a0, 1f - 10000; \
     jal a1, 1f; \
-    1: srl a1, a1, 12; \
-    sll a1, a1, 12; \
-    sub a0, a0, a1; \
+    1: sub a0, a0, a1; \
   )
 
   TEST_PASSFAIL