X-Git-Url: https://git.libre-soc.org/?p=riscv-tests.git;a=blobdiff_plain;f=isa%2Frv64si%2Fma_fetch.S;h=a97eecb6cbf394d2604250a87fbc737dca40e666;hp=db702d96773c8ba7cc03eddc291cb46dbec99770;hb=22742246287feda0be2666ba14ca6f4a6bc73bb2;hpb=8dda7b2034197109a2387ac3dd03c7ad1e8c0b65

diff --git a/isa/rv64si/ma_fetch.S b/isa/rv64si/ma_fetch.S
index db702d9..a97eecb 100644
--- a/isa/rv64si/ma_fetch.S
+++ b/isa/rv64si/ma_fetch.S
@@ -18,6 +18,7 @@ RVTEST_CODE_BEGIN
   #define sstatus mstatus
   #define scause mcause
   #define sepc mepc
+  #define sret mret
   #define stvec_handler mtvec_handler
 #endif